ARM Cortex R4F Benutzerhandbuch
Processor Signal Descriptions
ARM DDI 0363E
Copyright © 2009 ARM Limited. All rights reserved.
A-3
ID013010
Non-Confidential, Unrestricted Access
A.2
Global signals
Table A-1 shows the processor global signals.
The free clock is ungated, with minimal insertion delay, because it clocks the clock gating
circuits. Therefore, you must ensure that incoming clocks are balanced with the free clock.
circuits. Therefore, you must ensure that incoming clocks are balanced with the free clock.
Table A-1 Global signals
Signal
Direction
Clocking
Description
FREECLKIN
Input
-
Free version of the core clock.
CLKIN
Input
-
Core clock.
CLKIN2
Input
-
Core clock, in phase with DUALCKLIN, for configurations
with dual-redundant core.
with dual-redundant core.
a
nRESET
Input
Any
Core reset.
nSYSPORESET
Input
Any
System power on reset.
nCPUHALT
Input
Any
Processor halt after reset.
DBGNOCLKSTOP
Input
Any
Processor does not stop the clocks when entering WFI state.
DUALCLKIN
Input
-
Clock for second, redundant, core.
DUALCLKIN2
Input
-
Clock for second, redundant, core, in phase with CLKIN.
STANDBYWFI
Output
FREECLKIN
Indicates that the processor is in Standby mode and the
processor clock is stopped. You can use this signal for TCMs
RAM clock gating.
processor clock is stopped. You can use this signal for TCMs
RAM clock gating.
a. Not available in r0px revisions of the processor.