Sigma Gold TDP-52-SN3 Servicehandbuch
27.1.1999
4A0701GB.__1
7
Product: TDP-52-SN3 (Sigma Gold) / OA0701 Processor
5.1.4.2 Memories
Memory and external I/O-circuit address coding is done with the ASIC circuit
I305. The circuit options CSR, CSP, and OE are 0-active.
I305. The circuit options CSR, CSP, and OE are 0-active.
The program memory is in 256k*8 EPROM. The program uses the addresses
2100H...FFFFH. Page selection makes available another similar memory
block.
2100H...FFFFH. Page selection makes available another similar memory
block.
RAM-memory is 8k*8 CMOS RAM at the addresses 0000H...1FFFH. RAM
receives its power supply from its own regulator which is always operating,
even when the radio is in the OFF state.
receives its power supply from its own regulator which is always operating,
even when the radio is in the OFF state.
5.1.4.3 The Modem
The FFSK modem is located in the audio circuit. The modem is connected to
the CPU by a series line, input to synchronised port, and transmission is
controlled by an ASIC series output. The modem gives a 1200 Hz signal
RXCLK to the processor and TXCLK to ASIC. There is a data detector within
the modem, the speed of which is controlled by C438.The CPU A/D converter
measures the level of acceptance from ERPDET line. The same detector also
serves to control the HF function.
the CPU by a series line, input to synchronised port, and transmission is
controlled by an ASIC series output. The modem gives a 1200 Hz signal
RXCLK to the processor and TXCLK to ASIC. There is a data detector within
the modem, the speed of which is controlled by C438.The CPU A/D converter
measures the level of acceptance from ERPDET line. The same detector also
serves to control the HF function.
5.1.4.4 AFC
The AFC function is performed by an internal ASIC frequency counter. A 450
kHz intermediate frequency is amplified to a square-wave form by Q305. The
frequency is adjusted by ASIC pulse frequency modulated signal D/A 0, which
is integrated by C378. This approx. 2.5V DC voltage is fed to the synthesiser
AFC pin.
kHz intermediate frequency is amplified to a square-wave form by Q305. The
frequency is adjusted by ASIC pulse frequency modulated signal D/A 0, which
is integrated by C378. This approx. 2.5V DC voltage is fed to the synthesiser
AFC pin.
5.1.4.5 Sleep Timer
The phone puts the central functions to sleep for a time. Although everything
seems normal to the user, most of the functions are closed down. The radio
and audio units are closed down completely. The processor still has a power
supply, but the processor is halted and has minimal power consumption. Only
the ASIC circuit sleep timer and its 32 kHz crystal oscillator remain in active
mode. The phone is "woken up" by interrupting the sleep timer or by changing
the keyboard state. The sleep timer 32 kHz clock freqency is produced by the
oscillator made by crystal X305.
seems normal to the user, most of the functions are closed down. The radio
and audio units are closed down completely. The processor still has a power
supply, but the processor is halted and has minimal power consumption. Only
the ASIC circuit sleep timer and its 32 kHz crystal oscillator remain in active
mode. The phone is "woken up" by interrupting the sleep timer or by changing
the keyboard state. The sleep timer 32 kHz clock freqency is produced by the
oscillator made by crystal X305.
5.1.4.6 Warm Start
C352 and R352 measure the length of a voltage break. The voltage drops
during a break, after which it is measured by the A/D convertor. The time
constant is approx. 10 s . Thus a "warm start" is detected.
during a break, after which it is measured by the A/D convertor. The time
constant is approx. 10 s . Thus a "warm start" is detected.