Intel 440GX Benutzerhandbuch

Intel

®

 440GX AGPset Design Guide

3-16

Design Checklist

48MHz

Connect to CK100 through a 22 ohm series resistor.

A20GATE

Connected to SIO. 8.2K ohm pull-up to VCC3. 

A20M#

Part of CPU/bus frequency circuit. 2.7K ohm pull-up to VCC3.

AD[31:0]

Connect to PCI slots and 82443GX.

AEN

Connect to SIO and ISA slots.

APICACK# / GPO12

UP: Leave as a NC. DP: Connect to IOAPIC.

APICCS# / GPO13

UP: Leave as a NC. DP: Connected to IOAPIC. 8.2K ohm pull-up to VCC3.

APICREQ# / GPO15

8.2K ohm pull-up to VCC3. DP: Connected to IOAPIC. 

BALE

Connect to ISA slots.

BATLOW# / GPI9

8.2K ohm pull-up to 3VSB if BATLOW# is not used.

BIOSCS#

Connect to Flash.

C/BE#[3:0]

Connect to PCI slots and 82443GX.

CLOCKRUN#

100 ohm pull-down.

CONFIG1

8.2K ohm pull-up to 3VSB.

CONFIG2

8.2K ohm pull-down. 

CPURST

Leave as a NC.

CPU_STP# / GPO17

No connect, or connected to CK100 with 10K ohm pull-up to 3VSB.

DACK#[7:0]

Connect to ISA slots. DACK#[3:0] also connect to SIO.

DEVSEL# 

2.7K ohm pull-up to 5V or 10K ohm pull-up to 3V. Connect between 82443GX, 
PCI slots, and PIIX4E.

DREQ[7:0]

Connected to ISA slots. 5.6K ohm pull-down.

EXTSMI#

Connected to LM79. 8.2K ohm pull-up to 3VSB.

FERR#

Connect between CPUs. 220 ohm pull-up to 2.5V.

FRAME#

2.7K ohm pull-up to 5V or 10K ohm pull-up to 3V. Connect between 82443GX, 
PCI slots, and PIIX4E.

GNT[C:A]# / GPO[11:9]

No connect.

GPI1

Used as PCI_PME. 8.2K ohm pull-up to 3VSB. Pull-up to 3VSB is also required 
when not using this pin.

GPI[x:y] (Unused)

2.7K ohm pull-up to VCC3.

GPO[x:y] (Unused)

No connect.

IDSEL

100 ohm resistor to AD18.

IGNNE#

Part of CPU/bus frequency circuit. 2.7K ohm pull-up to VCC3. 

INIT#

Connected to CPUs. 330 ohm pull-up to 2.5V.

INTR

Part of CPU/bus frequency circuit. 2.7K ohm pull-up to VCC3. 

DP: Connected to IOAPIC.