Freescale Semiconductor EETX4K Benutzerhandbuch
Block Guide — S12EETX4KV0 V00.04
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3.3.3 RESERVED2
This register is reserved for factory testing and is not accessible.
Figure 3-4 RESERVED2
All bits read zero and are not writable.
3.3.4 ECNFG — EEPROM Configuration Register
The ECNFG register enables the EEPROM interrupts.
Figure 3-5 EEPROM Configuration Register (ECNFG)
CBEIE and CCIE bits are readable and writable while all remaining bits read zero and are not writable.
CBEIE — Command Buffer Empty Interrupt Enable.
The CBEIE bit enables an interrupt in case of an empty command buffer in the EEPROM module.
0 = Command Buffer Empty interrupt disabled.
CCIE — Command Complete Interrupt Enable.
The CCIE bit enables an interrupt in case all commands have been completed in the EEPROM module.
1 = An interrupt will be requested whenever the CCIF flag (see 3.3.6 ESTAT — EEPROM Status
0 = Command Complete interrupt disabled.
Address Offset: $_02
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Address Offset: $_03
7
6
5
4
3
2
1
0
R
CBEIE
CCIE
0
0
0
0
0
0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
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Freescale Semiconductor, Inc.
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