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Turbo PMAC User Manual
Talking to Turbo PMAC
43
The following table shows how the jumpers (Turbo PMAC boards) or DIP switches (Turbo PMAC2) set
the base address on the ISA or PC/104 port. A PMAC jumper that is OFF or a PMAC2 DIP-switch that is
OPEN adds the associated bit value to the base address; a jumper that is ON or a DIP-switch that is
CLOSED adds nothing to the base address value.
the base address on the ISA or PC/104 port. A PMAC jumper that is OFF or a PMAC2 DIP-switch that is
OPEN adds the associated bit value to the base address; a jumper that is ON or a DIP-switch that is
CLOSED adds nothing to the base address value.
Address Bit #
15 14 13 12 11 10 9 8 7 6 5 4
PMAC1 Jumper
x x x x
E91
E92
E66
E67
E68
E69
E70
E71
PMAC2 Switch
12 11 10 9 8 7 6 5 4 3 2 1
Bit Val (Dec)
32768 16384 8192 4096 2048 1024 512 256 128 64 32 16
Bit Val (Hex)
$8000 $4000 $2000 $1000 $800 $400 $200 $100 $80 $40 $20 $10
Default Jumper
- - - -
ON
ON
OFF
ON
ON
ON
ON
OFF
Default Switch
CLS CLS CLS CLS CLS CLS OPN CLS CLS CLS CLS OPN
PCI Bus
The PCI bus interface comes standard on board-level Turbo PMAC controllers with the –PCI suffix (e.g.
Turbo PMAC-PCI, Turbo PMAC2-PCI). The UMAC-CPCI Turbo CPU board has been designed to
accept a daughter board that implements the Compact PCI interface, a rack-mounted version of the PCI
bus (equivalent electrically and in software), but as of this writing the CPCI daughter board has not been
implemented.
The PCI bus interface comes standard on board-level Turbo PMAC controllers with the –PCI suffix (e.g.
Turbo PMAC-PCI, Turbo PMAC2-PCI). The UMAC-CPCI Turbo CPU board has been designed to
accept a daughter board that implements the Compact PCI interface, a rack-mounted version of the PCI
bus (equivalent electrically and in software), but as of this writing the CPCI daughter board has not been
implemented.
The basic communications on the PCI bus goes through the host port on the Turbo PMAC’s CPU. Dual-
ported RAM is an optional addition to this bus interface (see below). The address of the host port
communications in the I/O space of the PCI bus is selected by the host computer’s operating system.
Recent Microsoft Windows operating systems do this on a plug-and-play basis. The design of the PCI
bus interface on Turbo PMACs was implemented to be as much as possible like the older ISA bus
interface, to minimize any transition problems from users changing over from ISA. Other than the
automatic address setting, the software interface to the PCI bus on Turbo PMACs is identical to that for
the ISA bus.
ported RAM is an optional addition to this bus interface (see below). The address of the host port
communications in the I/O space of the PCI bus is selected by the host computer’s operating system.
Recent Microsoft Windows operating systems do this on a plug-and-play basis. The design of the PCI
bus interface on Turbo PMACs was implemented to be as much as possible like the older ISA bus
interface, to minimize any transition problems from users changing over from ISA. Other than the
automatic address setting, the software interface to the PCI bus on Turbo PMACs is identical to that for
the ISA bus.
VME Bus
The VME bus interface comes standard on board-level Turbo PMAC controllers with the –VME suffix
(e.g. Turbo PMAC-VME, Turbo PMAC2-VME). It is a slave interface on the bus, and can be used with
16, 24, and 32-bit addressing on the bus. The address, bus width, and other details of the interface are set
by the values of Turbo PMAC variables I90 – I99 at power-up/reset. The factory default setting is for 24-
bit addressing, with a base address of $7FA000 on the VME bus.
The VME bus interface comes standard on board-level Turbo PMAC controllers with the –VME suffix
(e.g. Turbo PMAC-VME, Turbo PMAC2-VME). It is a slave interface on the bus, and can be used with
16, 24, and 32-bit addressing on the bus. The address, bus width, and other details of the interface are set
by the values of Turbo PMAC variables I90 – I99 at power-up/reset. The factory default setting is for 24-
bit addressing, with a base address of $7FA000 on the VME bus.
The most basic communications on the VME bus goes through a set of 16 mailbox registers in the VME
interface IC on the Turbo PMAC, each capable of holding one character. Note that unlike the other
buses, this communications does not go through the Turbo CPU’s host port, so it is not possible to
download new operational firmware in bootstrap mode to the Turbo PMAC over the VME bus. Dual-
ported RAM is an optional addition to this bus interface (see below), but one that is virtually always used.
If DPRAM is present, usually it is easier to send text commands through the DPRAM, and the mailbox
registers are typically not used.
interface IC on the Turbo PMAC, each capable of holding one character. Note that unlike the other
buses, this communications does not go through the Turbo CPU’s host port, so it is not possible to
download new operational firmware in bootstrap mode to the Turbo PMAC over the VME bus. Dual-
ported RAM is an optional addition to this bus interface (see below), but one that is virtually always used.
If DPRAM is present, usually it is easier to send text commands through the DPRAM, and the mailbox
registers are typically not used.
The following table shows how I90 – I99 should be set for 24-bit and 32-bit addressing (16-bit is almost
never used), with and without dual-ported RAM. The values in the table are for a mailbox base address
on the bus of $abcdef00, and a DPRAM base address of $abg00000 (a and b are not used in 24-bit
addressing).
never used), with and without dual-ported RAM. The values in the table are for a mailbox base address
on the bus of $abcdef00, and a DPRAM base address of $abg00000 (a and b are not used in 24-bit
addressing).
I
Variable
I90 I91 I92 I93 I94 I95 I96 I97 I98 I99
24-bit,
no
DPRAM
$29 $04 * $cd $ef ** ** * $60 $10
24-bit, w/ DPRAM
$29
$04
*
$cd
$ef
**
**
$0g
$E0
$90
32-bit,
no
DPRAM
$39 $04 $ab $cd $ef ** ** * $60 $10
32-bit, w/ DPRAM
$39
$04
$ab
$cd
$ef
**
**
$0g
$E0
$90