Connect Tech PCIE/104 Benutzerhandbuch
Connect Tech Xtreme/SBC PCIe/104 Single Board Computer and PCIe/104 Qseven Carrier Board - User Manual
Revision 0.02
10
LVDS
Description
The
Xtreme/SBC
provides dual 18 or 24 bit LVDS display channels via P7, which are connected directly
from the Qseven module . LVDS panel supply power is selected with jumper J4 and backlight power is
selected with jumper J6. Both are current limited to 500 mA.
US15W: The US15W provides only a single 18 or 24 bit display channel. Each LVDS data pair carries two
bits, each channel has four data pairs.
selected with jumper J6. Both are current limited to 500 mA.
US15W: The US15W provides only a single 18 or 24 bit display channel. Each LVDS data pair carries two
bits, each channel has four data pairs.
Connectors & Jumpers
Function
LVDS Graphics
Location
P7
Type
Hirose DF14-30P-1.25H connector
Pinout
Pin
Signal
Description
1
VCC_PNL
Panel Power
2
VCC_PNL
Panel Power
3
GND
Digital ground
4
GND
Digital ground
5
LVDS_A3_N
Channel A Data
6
LVDS_A3_P
Channel A Data
7
LVDS_CLK_N
Channel A Clock
8
LVDS_ACLK_P
Channel A Clock
9
GND
Digital ground
10
LVDS_A2_N
Channel A Data
11
LVDS_A2_P
Channel A Data
12
LVDS_A1_N
Channel A Data
13
LVDS_A1_P
Channel A Data
14
LVDS_A0_N
Channel A Data
15
LVDS_A0_P
Channel A Data
16
GND
Digital ground
17
LVDS_B3_N
Channel B Data
18
LVDS_B3_P
Channel B Data
19
LVDS_BCLK_N
Channel B Clock
20
LVDS_BCLK_P
Channel B Clock
21
GND
Digital ground
22
LVDS_B2_N
Channel B Data
23
LVDS_B2_P
Channel B Data
24
LVDS_B1_N
Channel B Data
25
LVDS_B1_P
Channel B Data
26
LVDS_B0_N
Channel B Data
27
LVDS_B0_P
Channel B Data
28
GND
Digital ground
29
LVDS_DID_CLK
Display ID Clock
(3.3V)
30
LVDS_DID_DATA
Display ID Data (3.3V)