Motorola DSP56012 Benutzerhandbuch

Figure 4-20  HI Initialization—Host Side, Interrupt Mode

Reserved; write as 0

Initialize DSP

Initialize HI

Bit 7 = 1

Optional

Interrupt Control Register (ICR)
(Read/Write)

DMA Off

Bit 5 = 0
Bit 6 = 0

Step 2 Of HI Port Configuration

2. Option 3: Select Interrupt Mode For:

Enable 

Receive Data Full Interrupt

Bit 0 = 1
Bit 1 = 0

$0

2. Option 4: Load HI Interrupt vector if using the interrupt mode and the host processor requires an interrupt 
vector.

AA0328k

Enable 

Transmit Data Empty Interrupt

Bit 0 = 0
Bit 1 = 1

Enable 

Receive Data Full Interrupt And

Transmit Data Empty Interrupt

Bit 0 = 1
Bit 1 = 1

Interrupt Vector Register (IVR)
(Read/Write)

HF1

HF0

TREQ RREQ

7

0

6

5

4

3

2

1

HM0

HM1

INIT

IV3

IV2

IV1

IV0

7

0

6

5

4

3

2

1

IV5

IV6

IV7

$3

DSP To Host

Or

Host To DSP

Or

DSP To Host 

And

Host To DSP

IV2