Intel 8XC196MC Benutzerhandbuch
8XC196MC, MD, MH USER’S MANUAL
11-6
Figure 11-2. EPA Timer/Counters
The timer/counters can be used as time bases for input captures, output compares, and pro-
grammed interrupts (software timers). When a counter increments from FFFEH to FFFFH or dec-
rements from 0001H to 0000H, the counter-overflow/underflow interrupt pending bit is set. This
bit can optionally cause an interrupt. The clock source, direction-control source, count direction,
and resolution of the input capture or output compare are all programmable (see “Programming
the Timers” on page 11-15). The maximum count rate is one-half the internal clock rate, or
F
grammed interrupts (software timers). When a counter increments from FFFEH to FFFFH or dec-
rements from 0001H to 0000H, the counter-overflow/underflow interrupt pending bit is set. This
bit can optionally cause an interrupt. The clock source, direction-control source, count direction,
and resolution of the input capture or output compare are all programmable (see “Programming
the Timers” on page 11-15). The maximum count rate is one-half the internal clock rate, or
F
XTAL
1
/4 (see “Internal Timing” on page 2-7). This provides a minimum resolution for an input
capture or output compare of 250 ns (at 16 MHz).
resolution
=
F
XTAL1
/4
Timer 1 Overflow/Underflow
T2CONTROL.6
Timer 1
F
XTAL1
/4
Prescaler
Module
T1CONTROL.2:0
3
T1CONTROL.6
T1DIR
A3131-01
Timer 2
Clock
Prescaler
Module
T2CONTROL.2:0
3
Direction
Overflow/
Underflow
Clock
Direction
Quadrature Count
Quadrature Direction
Overflow/
Underflow
TIMER1
T1RELOAD
OVRTM
Interrupt
T1CLK
TIMER2
4
p
×
rescaler_divisor
F
XTA L1
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