Intel 8XC196MC Benutzerhandbuch
8XC196MC, MD, MH USER’S MANUAL
C-2
Table C-2. Register Name, Address, and Reset Status
Register
Mnemonic
Register Name
Hex
Addr
Binary Reset Value
High
Low
AD_COMMAND
A/D Command
1FAC
1000
0000
AD_RESULT (MC, MD)
AD_RESULT (MH)
A/D Result
1FAA
1111
1111
1100
0000
0111
1111
1100
0000
AD_TEST (MC, MD)
AD_TEST (MH)
A/D Test
1FAE
1100
0000
1000
1000
AD_TIME
A/D Time
1FAF
1111
1111
CCR0
Chip Configuration 0
†††
XXXX
XXXX
CCR1
Chip Configuration 1
†††
XXXX
XXXX
COMP0_CON
EPA Compare 0 Control
1F58
0000
0000
COMP1_CON
EPA Compare 1 Control
1F5C
0000
0000
COMP2_CON
EPA Compare 2 Control
1F60
0000
0000
COMP3_CON (MC, MD)
COMP3_CON (MH)
EPA Compare 3 Control
1F64
0000
0000
1F4C
COMP4_CON (MD)
EPA Compare 4 Control
1F68
0000
0000
COMP5_CON (MD)
EPA Compare 5 Control
1F6C
0000
0000
COMP0_TIME
EPA Compare 0 Time
1F5A
XXXX
XXXX
XXXX
XXXX
COMP1_TIME
EPA Compare 1 Time
1F5E
XXXX
XXXX
XXXX
XXXX
COMP2_TIME
EPA Compare 2 Time
1F62
XXXX
XXXX
XXXX
XXXX
COMP3_TIME (MC, MD)
COMP3_TIME (MH)
EPA Compare 3 Time
1F66
XXXX
XXXX
XXXX
XXXX
1F4E
COMP4_TIME (MD)
EPA Compare 4 Time
1F6A
XXXX
XXXX
XXXX
XXXX
COMP5_TIME (MD)
EPA Compare 5 Time
1F6E
XXXX
XXXX
XXXX
XXXX
EPA0_CON
EPA Capture/Comp 0 Control
1F40
0000
0000
EPA1_CON
EPA Capture/Comp 1 Control
1F44
0000
0000
EPA2_CON (MC, MD)
EPA Capture/Comp 2 Control
1F48
0000
0000
EPA3_CON (MC, MD)
EPA Capture/Comp 3 Control
1F4C
0000
0000
EPA4_CON (MD)
EPA Capture/Comp 4 Control
1F50
0000
0000
EPA5_CON (MD)
EPA Capture/Comp 5 Control
1F54
0000
0000
EPA0_TIME
EPA Capture/Comp 0 Time
1F42
XXXX
XXXX
XXXX
XXXX
†
Reset value is FFH when pin is not driven.
††
Reset value is 80H if the EA# pin is high, A9H if EA# is low.
†††
The CCRs are loaded with the contents of the chip configuration bytes (CCBs) after a device reset,
unless the device is entering programming modes (see “Entering Programming Modes” on page
16-13), in which case the programming chip configuration bytes (PCCBs) are used. The CCBs reside in
internal nonvolatile memory at addresses 2018H (CCB0) and 201AH (CCB1).
unless the device is entering programming modes (see “Entering Programming Modes” on page
16-13), in which case the programming chip configuration bytes (PCCBs) are used. The CCBs reside in
internal nonvolatile memory at addresses 2018H (CCB0) and 201AH (CCB1).