Renesas R5S72641 Benutzerhandbuch
Section 22 Renesas SPDIF Interface
Page 1158 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
19
NCSI
0
R/W
New Channel Status Information
Set this bit to 1 when new channel status information to
be corrected is in the transmitter.
be corrected is in the transmitter.
0: New channel status information has not been in
transmitter
1: New channel status information has been in transmitter
18
AOS
0
R/W
Audio Only Samples
Clear this bit to 0 when audio channel 1 and channel 2
registers contain user information. When this bit is set to
1, all user bits are cleared to 0.
registers contain user information. When this bit is set to
1, all user bits are cleared to 0.
0: User information present
1: User information not present
17
RME
0
R/W
Receiver Module Enable
Enables the receiver module.
0: Receiver module disabled
1: Receiver module enabled
16
TME
0
R/W
Transmitter Module Enable
Enables the transmitter module.
0: Transmitter module disabled
1: Transmitter module enabled
15
REIE
0
R/W
Receiver Error Interrupt Enable
Enables the receiver error interrupts.
0: Receiver error interrupt disabled
1: Receiver error interrupt enabled
14
TEIE
0
R/W
Transmitter Error Interrupt Enable
Enables the transmitter error interrupts.
0: Transmitter error interrupt disabled
1: Transmitter error interrupt enabled
13
UBOI
0
R/W
User Buffer Overrun Interrupt Enable
Enables the user buffer overrun interrupts.
0: User buffer overrun interrupt disabled
1: User buffer overrun interrupt enabled