Renesas R5S72641 Benutzerhandbuch
Section 20 Controller Area Network
Page 1004 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
20.3.3
Control Registers
The following sections describe control registers. The address is mapped as follow.
Important: These registers can only be accessed in Word size (16-bit).
Register Name
Address
Abbreviation
Access Size (bits)
Master Control Register
000
MCR
16
General Status Register
002
GSR
16
Bit Configuration Register 1
004
BCR1
16
Bit Configuration Register 0
006
BCR0
16
Interrupt Request Register
008
IRR
16
Interrupt Mask Register
00A
IMR
16
Error Counter Register
00C
TEC/REC
16
Figure 20.9 Control Registers
(1) Master Control Register (MCR)
The Master Control Register (MCR) is a 16-bit read/write register that controls this module.
MCR (Address = H'000)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
R/W
R/W
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R/W
R/W
MCR15 MCR14
TST[2:0]
MCR7
MCR6
MCR5
MCR2
MCR1
MCR0
Bit:
Initial value:
R/W:
-
-
-
-
-
Bit 15 — ID Reorder (MCR15): This bit changes the order of STDID, RTR, IDE and EXTID of
both message control and LAFM.
both message control and LAFM.
Bit15: MCR15
Description
0
This module is the same as HCAN2
1
This module is not the same as HCAN2 (Initial value)