Intel Gigabit Ethernet Controllers Benutzerhandbuch

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Provides adaptive Inter Frame Spacing (IFS) capability, enabling collision reduction in half 
duplex networks (82544GC/EI)

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Programmable host memory receive buffers (256 B to 16 KB)

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Programmable cache line size from 16 B to 128 B for efficient usage of PCI bandwidth

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Implements a total of 64 KB (40 KB for the 82547GI/EI) of configurable receive and transmit 

data FIFOs. Default allocation is 48 KB for the receive data FIFO and 16 KB for the transmit 

data FIFO 

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Descriptor ring management hardware for transmit and receive. Optimized descriptor fetching 

and write-back mechanisms for efficient system memory and PCI bandwidth usage

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Provides interrupt coalescing to reduce the number of interrupts generated by receive and 
transmit operations (82544GC/EI)

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Supports reception and transmission of packets with length up to 16 KB

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New intelligent interrupt generation features to enhance driver performance (not applicable to 
the 82544GC/EI):

— Packet interrupt coalescing timers (packet timers) and absolute-delay interrupt timers for 

both transmit and receive operation

— Short packet detection interrupt for improved response time to TCP acknowledges

— Transmit Descriptor Ring “Low” signaling

— Interrupt throttling control to limit maximum interrupt rate and improve CPU utilization