Intel 8XC196MD Benutzerhandbuch
8XC196MC, MD, MH USER’S MANUAL
15-34
Table 15-9. Microcontroller Meets These Specifications
Symbol
Definition
T
AVLL
Address Setup to ALE/ADV# Low
Length of time address is valid before ALE/ADV# falls. Useful when using an external latch to
demultiplex the address from the address data bus.
demultiplex the address from the address data bus.
T
CHCL
†
CLKOUT High CLKOUT Low
CLKOUT pulse width. Useful when using CLKOUT to clock external devices.
T
CLCL
†
CLKOUT Cycle Time
The period of the CLKOUT signal; equal to 2T
XTAL
1
.
T
CLLH
†
CLKOUT Low to ALE/ADV# High
T
LHLH
ALE Cycle Time
Minimum time between two ALE rising edges.
T
LHLL
ALE High to ALE Low
ALE pulse width. Useful when using an external latch to demultiplex the address from the
address data bus.
address data bus.
T
LLAX
AD15:0 Hold after ALE/ADV# Low
Length of time address is valid after ALE/ADV# falls. Useful when using an external latch to
demultiplex the address from the address data bus.
demultiplex the address from the address data bus.
T
LLCH
†
ALE/ADV# Low to CLKOUT High
T
LLRL
ALE/ADV# Low to RD# Low
Length of time after ALE/ADV# falls before the microcontroller asserts RD#. Maximum time a
memory system has to decode the address before the microcontroller asserts RD#.
memory system has to decode the address before the microcontroller asserts RD#.
T
LLWL
ALE/ADV# Low to WR# Low
Length of time after ALE/ADV# falls before the microcontroller asserts WR#. Maximum time a
memory system has to decode the address before the microcontroller asserts WR#.
memory system has to decode the address before the microcontroller asserts WR#.
T
QVWH
Output Data Valid to WR# High
Length of time output data is valid before the microcontroller deasserts WR#.
T
RHAX
Address (high byte) Hold after RD# High
Minimum time the high byte of the address (when using an 8-bit data bus) is valid after the
microcontroller deasserts RD#.
microcontroller deasserts RD#.
T
RHBX
BHE#, INST Hold after RD# High
Minimum time these signals are valid after the microcontroller deasserts RD#.
T
RHLH
RD# High to ALE High
Time between the microcontroller deasserting RD# and the next ALE pulse. Maximum time the
memory system has to put data on the bus before the next address cycle.
memory system has to put data on the bus before the next address cycle.
T
RLAZ
RD# Low to Address Float
Time after the microcontroller deasserts RD# until it stops driving the address on the bus.
T
RLRH
RD# Low to RD# High
RD# pulse width.
†
The CLKOUT pin is available only on the 8XC196MC, MD microcontrollers.