Intel 8XC196MD Benutzerhandbuch
8XC196MC, MD, MH USER’S MANUAL
C-30
Px_DIR
P
x
_DIR
x
= 2, 5 (8XC196MC)
x
= 2, 5, 7 (8XC196MD)
x
= 1, 2, 5 (8XC196MH)
Address:
Reset State:
Table C-6
Each pin of port
x
can operate in any of the standard I/O modes of operation: complementary output,
open-drain output, or high-impedance input. The port
x
I/O direction (P
x
_DIR) register determines the
I/O direction for each port
x
pin. The register settings for an open-drain output or a high-impedance
input are identical. An open-drain output configuration requires an external pull-up. A high-impedance
input configuration requires that the corresponding bit in P
input configuration requires that the corresponding bit in P
x
_REG be set.
7
0
x
= 1 (MH)
—
—
—
—
PIN3
PIN2
PIN1
PIN0
7
0
x
= 2, 5 (M
x
)
PIN7
PIN6
PIN5
PIN4
PIN3
PIN2
PIN1
PIN0
7
0
x
= 7 (MD)
PIN7
PIN6
PIN5
PIN4
PIN3
PIN2
PIN1
PIN0
Bit
Number
Bit
Mnemonic
Function
7:0
†
PIN7:0
Port
x
Pin
y
Direction
This bit selects the P
x
.
y
direction:
0 = complementary output (output only)
1 = input or open-drain output (input, output, or bidirectional open-
1 = input or open-drain output (input, output, or bidirectional open-
drain outputs require external pull-ups.
†
The bits shown as dashes (—) are reserved; for compatibility with future devices, write ones to these
bits.
bits.
Table C-6. P
x_DIR Addresses and Reset Values
Register
Address
Reset Value
P1_DIR (8XC196MH)
1F9BH
FFH
P2_DIR (8XC196M
x
)
1FD2H
FFH
P5_DIR (8XC196M
x
)
1FF3H
FFH
P7_DIR (8XC196MD)
1FD3H
FFH