Intel Embedded Microcontroller Benutzerhandbuch
8XC251SA, SB, SP, SQ USER’S MANUAL
A-18
SRA
Rm
Shift byte reg right through the MSB
3
2
2
1
WRj
Shift word reg right through the MSB
3
2
2
1
SRL
Rm
Shift byte reg right
3
2
2
1
WRj
Shift word reg right
3
2
2
1
SWAP
A
Swap nibbles within the acc
1
2
1
2
Table A-23. Summary of Logical Instructions (Continued)
Logical AND
ANL <dest>,<src>
dest opnd
←
dest opnd
Λ
src
opnd
Logical OR
ORL <dest>,<src>
dest opnd
←
dest opnd V
src
opnd
Logical Exclusive OR
XRL <dest>,<src>
dest opnd
←
dest opnd
∀
src
opnd
Clear
CLR A
(A)
←
0
Complement
CPL A
(Ai)
←
Ø(Ai)
Rotate
RXX A
(1)
Shift
SXX Rm or Wj
(1)
SWAP
A
A3:0
↔
A7:4
Mnemonic
<dest>,<src>
Notes
Binary Mode
Source Mode
Bytes
States
Bytes
States
NOTES:
1.
1.
See section A.4, “Instruction Descriptions.”
2.
A shaded cell denotes an instruction in the MCS
®
51 architecture.
3.
If this instruction addresses an I/O port (P
x
,
x
= 0–3), add 1 to the number of states.
4.
If this instruction addresses an I/O port (P
x
,
x
= 0–3), add 2 to the number of states.