Benutzerhandbuch für Acer Intel Xeon L5520

Inhaltsverzeichnis

• 1 Introduction

  9
  • 1.1 Terminology

    10
  • 1.2 References

    12
• 2 Intel® Xeon® Processors 5500 Series Electrical Specifications

  13
  • 2.1 Processor Signaling

    13
    • 2.1.1 Intel QuickPath Interconnect

      13
    • 2.1.2 DDR3 Signal Groups

      13
    • 2.1.3 Platform Environmental Control Interface (PECI)

      14
    • 2.1.4 Processor Sideband Signals

      14
    • 2.1.5 System Reference Clock

      14
    • 2.1.6 Test Access Port (TAP) Signals

      15
    • 2.1.7 Power / Other Signals

      15
    • 2.1.8 Reserved or Unused Signals

      23
  • 2.2 Signal Group Summary

    23
  • 2.3 Mixing Processors

    25
  • 2.4 Flexible Motherboard Guidelines (FMB)

    26
  • 2.5 Absolute Maximum and Minimum Ratings

    26
  • 2.6 Processor DC Specifications

    28
    • 2.6.1 VCC Overshoot Specifications

      31
    • 2.6.2 Die Voltage Validation

      32
• 3 Package Mechanical Specifications

  43
  • 3.1 Package Mechanical Specifications

    43
    • 3.1.1 Package Mechanical Drawing

      44
    • 3.1.2 Processor Component Keep-Out Zones

      47
    • 3.1.3 Package Loading Specifications

      47
    • 3.1.4 Package Handling Guidelines

      47
    • 3.1.5 Package Insertion Specifications

      47
    • 3.1.6 Processor Mass Specification

      48
    • 3.1.7 Processor Materials

      48
    • 3.1.8 Processor Markings

      48
    • 3.1.9 Processor Land Coordinates

      48
• 4 Land Listing

  49
  • 4.1 Intel® Xeon® Processors 5500 Series Pin Assignments

    49
    • 4.1.1 Land Listing by Land Name

      49
    • 4.1.2 Land Listing by Land Number

      67
• 5 Signal Definitions

  85
  • 5.1 Signal Definitions

    85
• 6 Thermal Specifications

  89
  • 6.1 Package Thermal Specifications

    89
    • 6.1.1 Thermal Specifications

      89
    • 6.1.2 Thermal Metrology

      103
  • 6.2 Processor Thermal Features

    104
    • 6.2.1 Processor Temperature

      104
    • 6.2.2 Adaptive Thermal Monitor

      104
    • 6.2.3 On-Demand Mode

      106
    • 6.2.4 PROCHOT# Signal

      106
    • 6.2.5 THERMTRIP# Signal

      107
  • 6.3 Platform Environment Control Interface (PECI)

    107
    • 6.3.1 PECI Client Capabilities

      108
    • 6.3.2 Client Command Suite

      109
    • 6.3.3 Multi-Domain Commands

      125
    • 6.3.4 Client Responses

      125
    • 6.3.5 Originator Responses

      126
    • 6.3.6 Temperature Data

      127
    • 6.3.7 Client Management

      128
• 7 Features

  131
  • 7.1 Power-On Configuration (POC)

    131
  • 7.2 Clock Control and Low Power States

    132
    • 7.2.1 Thread and Core Power State Descriptions

      133
    • 7.2.2 Package Power State Descriptions

      134
    • 7.2.3 Intel® Xeon® Processor 5500 Series C-State Power Specifications

      135
  • 7.3 Sleep States

    136
  • 7.4 Intel® Turbo Boost Technology

    136
  • 7.5 Enhanced Intel SpeedStep® Technology

    136
• 8 Boxed Processor Specifications

  137
  • 8.1 Introduction

    137
    • 8.1.1 Available Boxed Thermal Solution Configurations

      137
    • 8.1.2 An Intel “Combo” Boxed Passive / Active Combination Heat Sink Solution

      137
    • 8.1.3 Intel Boxed “Active” Heat Sink Solution

      138
    • 8.1.4 Intel Boxed 25.5mm Tall Passive Heat Sink Solution

      139
  • 8.2 Mechanical Specifications

    140
    • 8.2.1 Boxed Processor Heat Sink Dimensions and Baseboard Keepout Zones

      140
    • 8.2.2 Boxed Processor Retention Mechanism and Heat Sink Support (URS)

      149
  • 8.3 Fan Power Supply (“Combo” and “Active” Solution)

    150
    • 8.3.1 Boxed Processor Cooling Requirements

      151
  • 8.4 Boxed Processor Contents

    153