BenutzerhandbuchInhaltsverzeichnisFeatures1Functional Description1Selection Guide1Logic Block Diagram - CY7C1380D/CY7C1380F [3] (512K x 36)2Logic Block Diagram - CY7C1382D/CY7C1382F [3] (1M x 18)2Pin Configurations3100-Pin TQFP Pinout (3-Chip Enable)3119-Ball BGA Pinout4165-Ball FBGA Pinout (3-Chip Enable)5Functional Overview8Single Read Accesses8Single Write Accesses Initiated by ADSP8Single Write Accesses Initiated by ADSC8Burst Sequences9Sleep Mode9Truth Table10Truth Table for Read/Write [4, 9]11Truth Table for Read/Write [4, 9]11IEEE 1149.1 Serial Boundary Scan (JTAG)12Disabling the JTAG Feature12TAP Controller State Diagram12Test Access Port (TAP)12Test Clock (TCK)12Test MODE SELECT (TMS)12Test Data-In (TDI)12Test Data-Out (TDO)12TAP Controller Block Diagram12PERFORMING A TAP RESET12TAP REGISTERS12INSTRUCTION REGISTER12BYPASS REGISTER13BOUNDARY SCAN REGISTER13IDENTIFICATION (ID) REGISTER13TAP Instruction Set13OVERVIEW13EXTEST13IDCODE13SAMPLE Z13SAMPLE/PRELOAD13BYPASS13EXTEST Output Bus Tri-State13Reserved14TAP Timing14TAP AC Switching Characteristics Over the Operating Range [10, 11]143.3V TAP AC Test Conditions152.5V TAP AC Test Conditions15TAP DC Electrical Characteristics And Operating Conditions (0 C < TA < +70 C; VDD = 3.3V ±0.165V unless otherwise noted) [12]15Identification Register Definitions16Scan Register Sizes16Identification Codes16119-Ball BGA Boundary Scan Order [14, 15]17165-Ball BGA Boundary Scan Order [14, 16]18Maximum Ratings19Operating Range19Electrical Characteristics Over the Operating Range [17, 18]19Capacitance [19]20Thermal Resistance [19]20Switching Characteristics Over the Operating Range [20, 21]22Switching Waveforms23Ordering Information27Package Diagrams30Document History Page33Sales, Solutions, and Legal Information34Worldwide Sales and Design Support34Products34PSoC Solutions34Größe: 1,07 MBSeiten: 34Language: EnglishHandbuch öffnen
