Benutzerhandbuch (HMT42GR7BMR4C-G7)InhaltsverzeichnisDescription3Features3Ordering Information3Key Parameters4Speed Grade4Address Table4Pin Descriptions5Input/Output Functional Descriptions6Pin Assignments8Registering Clock Driver Specifications10Capacitance Values10Input & Output Timing Requirements10On DIMM Thermal Sensor11Connection of Thermal Sensor11Temperature-to-Digital Conversion Performance11Functional Block Diagram122GB, 256Mx72 Module(1Rank of x8)124GB, 512Mx72 Module(2Rank of x8) - page1134GB, 512Mx72 Module(2Rank of x8) - page2144GB, 512Mx72 Module(1Rank of x4) - page1154GB, 512Mx72 Module(1Rank of x4) - page2168GB, 1Gx72 Module(4Rank of x8) - page1178GB, 1Gx72 Module(4Rank of x8) - page2188GB, 1Gx72 Module(4Rank of x8) - page3198GB, 1Gx72 Module(2Rank of x4) - page1208GB, 1Gx72 Module(2Rank of x4) - page2218GB, 1Gx72 Module(2Rank of x4) - page32216GB, 2Gx72 Module(4Rank of x4) - page12316GB, 2Gx72 Module(4Rank of x4) - page22416GB, 2Gx72 Module(4Rank of x4) - page32516GB, 2Gx72 Module(4Rank of x4) - page42616GB, 2Gx72 Module(4Rank of x4) - page527Absolute Maximum Ratings28Absolute Maximum DC Ratings28DRAM Component Operating Temperature Range28AC & DC Operating Conditions29Recommended DC Operating Conditions29AC & DC Input Measurement Levels30AC and DC Input Levels for Single-Ended Command and Address Signals30AC and DC Input Levels for Single-Ended Signals31Vref Tolerances32AC and DC Logic Input Levels for Differential Signals33Differential signal definition33Differential swing requirements for clock (CK - CK) and strobe (DQS-DQS)34Single-ended requirements for differential signals35Differential Input Cross Point Voltage37Slew Rate Definitions for Single-Ended Input Signals38Slew Rate Definitions for Differential Input Signals38AC & DC Output Measurement Levels39Single Ended AC and DC Output Levels39Differential AC and DC Output Levels39Single Ended Output Slew Rate40Differential Output Slew Rate41Reference Load for AC Timing and Output Slew Rate42Overshoot and Undershoot Specifications43Address and Control Overshoot and Undershoot Specifications43Clock, Data, Strobe and Mask Overshoot and Undershoot Specifications44Refresh parameters by device density45Standard Speed Bins46DDR3-800 Speed Bins46DDR3-1066 Speed Bins47DDR3-1333 Speed Bins48DDR3-1600 Speed Bins49Speed Bin Table Notes50Environmental Parameters51IDD and IDDQ Specification Parameters and Test Conditions52IDD Specifications (Tcase: 0 to 95oC)642GB, 256M x 72 R-DIMM: HMT325R7BFR8C644GB, 512M x 72 R-DIMM: HMT351R7BFR8C644GB, 512M x 72 R-DIMM: HMT351R7BFR4C658GB, 1G x 72 R-DIMM: HMT31GR7BFR8C658GB, 1G x 72 R-DIMM: HMT31GR7BFR4C6616GB, 2G x 72 R-DIMM: HMT42GR7BMR4C66Module Dimensions67256Mx72 - HMT325R7BFR8C67512Mx72 - HMT351R7BFR8C68512Mx72 - HMT351R7BFR4C691Gx72 - HMT31GR7BFR8C701Gx72 - HMT31GR7BFR8C - Heat Spreader711Gx72 - HMT31GR7BFR4C721Gx72 - HMT31GR7BFR4C - Heat Spreader732Gx72 - HMT42GR7BMR4C742Gx72 - HMT42GR7BMR4C - Heat Spreader75Größe: 984 KBSeiten: 75Language: EnglishHandbuch öffnen
