Benutzerhandbuch für Intel 80C186EC

Inhaltsverzeichnis

• CHAPTER 1 About This Manual

  9
  • 1.1 CONTENT OVERVIEW

    9
  • 1.2 Notation Conventions

    10
  • 1.3 Related Documents

    11
  • 1.4 Electronic Support Systems

    12
    • 1.4.1 FaxBack Service

      12
    • 1.4.2 World Wide Web

      12
  • 1.5 Technical Support

    13
• CHAPTER 2 Getting Started

  17
  • 2.1 System Requirements

    19
  • 2.2 What’s in your kit

    19
  • 2.3 Viewing the Board Schematics

    20
  • 2.4 Setting UP the Evaluation Board and the Host PC

    20
• CHAPTER 3 Hardware Overview

  25
  • 3.1 Jumper Summary

    25
  • 3.2 Microprocessor

    26
    • 3.2.1 Packaging

      26
  • 3.3 Memory Configuration

    27
    • 3.3.1 Flash (Program Memory)

      29
      • 3.3.1.1 Setting Up the Board for Flash Downloading...

        29
    • 3.3.2 SRAM (Static Memory)

      31
  • 3.4 Programmable Logic

    31
  • 3.5 Power Supply

    32
  • 3.6 Serial Interface

    33
  • 3.7 Expansion Interface

    36
  • 3.8 LCD Interface

    39
    • 3.8.1 LCD Interface Demo

      39
• CHAPTER 4 Introduction to the Software

  43
  • 4.1 software Features

    43
  • 4.2 Restrictions

    44
  • 4.3 Embedded Controller Monitor (ECM)

    44
  • 4.4 User Interface

    45
    • 4.4.1 Numeric Input

      45
    • 4.4.2 Controlling Lengthy Commands

      45
    • 4.4.3 Aborting from iECM-86

      45
  • 4.5 Initiating and Terminating iECM-86

    45
    • 4.5.1 ECM86

      45
    • 4.5.2 -COM2, -COM1

      46
    • 4.5.3 -DIAG

      46
    • 4.5.4 -POLL, -SIGNAL

      47
    • 4.5.5 RESET SYSTEM, RES SYSTEM, RESET, RES

      47
    • 4.5.6 DOS

      47
    • 4.5.7 QUIT

      47
  • 4.6 Related Information

    48
    • 4.6.1 Reserved Functions

      48
    • 4.6.2 Reserved Memory

      48
    • 4.6.3 Reserved I/O

      48
• CHAPTER 5 iECM-86 Commands

  49
  • 5.1 Entering Commands

    51
  • 5.2 FILE OPERATIONS

    52
    • 5.2.1 Loading and Saving Object Code

      52
    • 5.2.2 Other File Operations

      53
  • 5.3 PROGRAM CONTROL

    55
    • 5.3.1 Resetting the Target

      55
    • 5.3.2 Breakpoints

      55
    • 5.3.3 Program Execution

      57
    • 5.3.4 Program Stepping

      58
  • 5.4 DISPLAYING AND MODIFYING PROGRAM VARIABLES

    60
    • 5.4.1 Supported Data Types

      60
    • 5.4.2 BYTE Commands

      61
    • 5.4.3 WORD Commands

      62
    • 5.4.4 DWORD Commands

      63
    • 5.4.5 STACK Commands

      64
    • 5.4.6 STRING Commands

      65
    • 5.4.7 PORT Commands

      65
    • 5.4.8 WPORT Commands

      66
    • 5.4.9 Processor Variables

      67
• CHAPTER 6 iRISM-186 Commands

  71
  • 6.1 iRISM VARIABLES

    71
    • 6.1.1 Other Variables

      71
  • 6.2 RISM Structure

    72
  • 6.3 Receiving Data from the Host

    72
  • 6.4 Sending Data to the Host

    72
  • 6.5 RISM Commands

    72
    • 6.5.1 SET_DATA_FLAG (Code 00H)

      73
    • 6.5.2 TRANSMIT (Code 02H)

      73
    • 6.5.3 READ_BYTE (Code 04H)

      73
    • 6.5.4 READ_WORD (Code 05H)

      73
    • 6.5.5 READ_DOUBLE (Code 06H)

      73
    • 6.5.6 WRITE_BYTE (Code 07H)

      73
    • 6.5.7 WRITE_WORD (Code 08H)

      73
    • 6.5.8 WRITE_DOUBLE (Code 09H)

      74
    • 6.5.9 LOAD_ADDRESS (Code 0AH)

      74
    • 6.5.10 READ_PC (Code 10H)

      74
    • 6.5.11 WRITE_PC (Code 11H)

      74
    • 6.5.12 START_USER (Code 12H)

      74
    • 6.5.13 STOP_USER (code 13H)

      74
    • 6.5.14 TRAP_ISR

      75
    • 6.5.15 REPORT_STATUS (Code 14H)

      75
    • 6.5.16 MONITOR_ESCAPE (Code 15H)

      75
    • 6.5.17 READ_BPORT (Code 16H)

      75
    • 6.5.18 WRITE_BPORT (Code 17H)

      75
    • 6.5.19 READ_WPORT (Code 18H)

      75
    • 6.5.20 WRITE_WPORT (Code 19H)

      76
    • 6.5.21 STEP (Code 1AH)

      76
    • 6.5.22 READ_REG (Code 1BH)

      76
    • 6.5.23 WRITE_REG (Code 1CH)

      76
    • 6.5.24 Start Up Commands (/ or \)

      77
• FIGURES

  6
  • Figure 21. Intel 186 EB Evaluation Board Layout

    17
  • Figure 22. Intel 186 EC Evaluation Board Layout

    18
  • Figure 31. Physical Memory Map

    28
  • Figure 32. Jumper Assembly for Flash Downloading

    30
  • Figure 33. E1 Jumper

    32
  • Figure 34. J2 Power Connector

    32
  • Figure 35. 25-Pin to 9-Pin Adaptor

    35
  • Figure 3 6. 186 EC Peripheral Expansion Connector JP2 (40 pin)

    36
  • Figure 3 7. 186 EB Peripheral Expansion Connector (24 pin)

    37
  • Figure 38. CPU Bus Expansion (EB and EC)

    38
• TABLES

  6
  • Table 11. Customer Support Telephone Numbers

    13
  • Table 3 1. 80x186EB/EC Evaluation Board Jumper Settings

    25
  • Table 32. Logical Memory Map

    27
  • Table 33. P1 Host Serial Connector

    33
  • Table 34. P2 Serial Channel 0

    34
  • Table 61. iRISM Variables

    71
  • Table 6 2. iRISM Registers

    76
  • Table A 1. 80186 EB Board Manual Parts List

    81
  • Table A 2. 80186 EC Board Manual Parts List

    84