Benutzerhandbuch für Spectrum Brands MC.31XX

Inhaltsverzeichnis

• Introduction

  6
  • Preface

    6
  • General Information

    6
  • Different models of the MC.31xx series

    7
  • Additional options

    9
    • Digital inputs

      9
    • Extra I/O (Option -XMF)

      9
    • Starhub

      10
    • Timestamp

      10
  • The Spectrum type plate

    11
  • Hardware information

    12
    • Block diagram

      12
    • Dynamic Parameters

      13
    • Order information

      13
• Hardware Installation

  14
  • System Requirements

    14
  • Warnings

    14
    • ESD Precautions

      14
    • Cooling Precautions

      14
    • Sources of noise

      14
  • Installing the board in the system

    14
    • Installing a single board without any options

      14
    • Installing a board with digital inputs/outputs

      15
    • Installing a board with extra I/O (Option -XMF)

      15
    • Installing multiple boards synchronized by starhub

      16
    • Installing multiple synchronized boards

      17
• Software Driver Installation

  18
  • Interrupt Sharing

    18
  • Windows 98

    19
    • Installation

      19
    • Version control

      19
    • Driver - Update

      20
  • Windows 2000

    21
    • Installation

      21
    • Version control

      21
    • Driver - Update

      22
  • Windows XP

    23
    • Installation

      23
    • Version control

      23
    • Driver - Update

      24
  • Windows NT

    25
    • Installation

      25
    • Adding boards to the Windows NT driver

      25
    • Driver - Update

      25
  • Linux

    26
    • Overview

      26
    • Installation

      26
• Software

  28
  • Software Overview

    28
  • First Test with SBench

    28
  • C/C++ Driver Interface

    29
    • Header files

      29
    • Microsoft Visual C++

      29
    • Borland C++ Builder

      29
    • Linux Gnu C

      29
    • Other Windows C/C++ compilers

      30
    • National Instruments LabWindows/CVI

      30
    • Driver functions

      30
  • Delphi (Pascal) Programming Interface

    32
    • Type definition

      32
    • Include Driver

      32
    • Examples

      32
    • Driver functions

      32
  • Visual Basic Programming Interface

    34
    • Include Driver

      34
    • Visual Basic Examples

      34
    • VBA for Excel Examples

      34
    • Driver functions

      34
• Programming the Board

  36
  • Overview

    36
  • Register tables

    36
  • Programming examples

    36
  • Error handling

    36
  • Initialization

    37
    • Starting the automatic initialization routine

      37
    • PCI Register

      37
    • Hardware version

      38
    • Date of production

      38
    • Serial number

      38
    • Maximum possible sample rate

      38
    • Installed memory

      38
    • Installed features and options

      38
    • Used interrupt line

      39
    • Used type of driver

      39
  • Powerdown and reset

    40
• Analog Inputs

  41
  • Channel Selection

    41
    • Important note on channels selection

      41
  • Channel rerouting

    42
  • Setting up the inputs

    43
    • Input ranges

      43
    • Input offset

      44
    • Overrange bit

      45
    • Input termination

      45
    • Automatical adjustment of the offset settings

      45
• Standard acquisition modes

  47
  • General Information

    47
  • Programming

    47
    • Memory, Pre- and Posttrigger

      47
    • Starting without interrupt (classic mode)

      48
    • Starting with interrupt driven mode

      49
    • Data organization

      50
    • Sample format

      50
    • Reading out the data with SpcGetData

      51
• FIFO Mode

  53
  • Overview

    53
    • General Information

      53
    • Background FIFO Read

      53
    • Speed Limitations

      53
  • Programming

    54
    • Software Buffers

      54
    • Buffer processing

      55
    • FIFO mode

      56
    • Example FIFO acquisition mode

      56
    • Data organization

      56
    • Sample format

      57
• Clock generation

  58
  • Overview

    58
  • Internally generated sample rate

    58
    • Standard internal sample rate

      58
    • Using plain quartz without PLL

      59
  • External clocking

    60
    • Direct external clock

      60
    • External clock with divider

      61
• Trigger modes and appendant registers

  62
  • General Description

    62
  • Software trigger

    62
  • External TTL trigger

    62
    • Edge triggers

      63
    • Pulsewidth triggers

      64
  • Channel Trigger

    66
    • Overview of the channel trigger registers

      66
    • Triggerlevel

      67
    • Detailed description of the channel trigger modes

      69
• Option Multiple Recording

  77
  • Recording modes

    77
    • Standard Mode

      77
    • FIFO Mode

      77
  • Trigger modes

    77
    • Resulting start delays

      78
• Option Gated Sampling

  79
  • Recording modes

    79
    • Standard Mode

      79
    • FIFO Mode

      79
  • Trigger modes

    79
    • General information and trigger delay

      79
    • End of gate alignement

      80
    • Alignement samples per channel

      80
    • Resulting start delays

      81
    • Number of samples on gate signal

      81
    • Allowed trigger modes

      81
  • Example program

    82
• Option Timestamp

  83
  • General information

    83
    • Limits

      83
  • Timestamp modes

    83
    • Standard mode

      83
    • StartReset mode

      83
    • RefClock mode (optional)

      84
  • Timestamp Status

    84
  • Reading out timestamp data

    84
    • Functions for accessing the data

      84
    • Data format

      85
  • Example programs

    86
    • Standard acquisition mode

      86
    • Acquisition with Multiple Recording

      86
• Option Extra I/O

  87
  • Digital I/Os

    87
    • Channel direction

      87
    • Transfer Data

      87
  • Analog Outputs

    87
  • Programming example

    88
• Option Digital inputs

  89
• Synchronization (Option)

  90
  • The different synchronization options

    90
    • Synchronization with option cascading

      90
    • Synchronization with option starhub

      90
  • The setup order for the different synchronization options

    91
    • Setup Order for use with standard (non FIFO) mode and equally clocked boards

      91
  • Setup synchronization for use with FIFO mode and equally clokked boards

    94
    • Additions for synchronizing different boards

      96
    • Additions for equal boards with different sample rates

      99
    • Resulting delays using different boards or speeds

      99
• Appendix

  100
  • Error Codes

    100
  • Pin assignment of the multipin connector

    101
    • Extra I/O with external connector(Option -XMF)

      101
    • Option “Digital inputs“

      101
  • Pin assignment of the multipin cable

    102