Benutzerhandbuch für Texas Instruments TMS320x28xx

Inhaltsverzeichnis

• Table of Contents

  3
• Preface

  9
• 1 Introduction

  13
  • 1.1 Introduction

    14
  • 1.2 Submodule Overview

    14
  • 1.3 Register Mapping

    17
• 2 ePWM Submodules

  19
  • 2.1 Overview

    20
  • 2.2 Time-Base (TB) Submodule

    23
    • 2.2.1 Purpose of the Time-Base Submodule

      23
    • 2.2.2 Controlling and Monitoring the Time-base Submodule

      24
    • 2.2.3 Calculating PWM Period and Frequency

      25
      • 2.2.3.1  Time-Base Period Shadow Register

        26
      • 2.2.3.2  Time-Base Counter Synchronization

        27
    • 2.2.4 Phase Locking the Time-Base Clocks of Multiple ePWM Modules

      30
    • 2.2.5 Time-base Counter Modes and Timing Waveforms

      30
  • 2.3 Counter-Compare (CC) Submodule

    32
    • 2.3.1 Purpose of the Counter-Compare Submodule

      33
    • 2.3.2 Controlling and Monitoring the Counter-Compare Submodule

      33
    • 2.3.3 Operational Highlights for the Counter-Compare Submodule

      34
    • 2.3.4 Count Mode Timing Waveforms

      34
  • 2.4 Action-Qualifier (AQ) Submodule

    37
    • 2.4.1 Purpose of the Action-Qualifier Submodule

      37
    • 2.4.2 Action-Qualifier Submodule Control and Status Register Definitions

      37
    • 2.4.3 Action-Qualifier Event Priority

      40
    • 2.4.4 Waveforms for Common Configurations

      41
  • 2.5 Dead-Band Generator (DB) Submodule

    50
    • 2.5.1 Purpose of the Dead-Band Submodule

      50
    • 2.5.2 Controlling and Monitoring the Dead-Band Submodule

      50
    • 2.5.3 Operational Highlights for the Dead-Band Submodule

      51
  • 2.6 PWM-Chopper (PC) Submodule

    55
    • 2.6.1 Purpose of the PWM-Chopper Submodule

      55
    • 2.6.2 Controlling the PWM-Chopper Submodule

      55
    • 2.6.3 Operational Highlights for the PWM-Chopper Submodule

      55
    • 2.6.4 Waveforms

      56
      • 2.6.4.1  One-Shot Pulse

        57
      • 2.6.4.2  Duty Cycle Control

        58
  • 2.7 Trip-Zone (TZ) Submodule

    59
    • 2.7.1 Purpose of the Trip-Zone Submodule

      59
    • 2.7.2 Controlling and Monitoring the Trip-Zone Submodule

      60
    • 2.7.3 Operational Highlights for the Trip-Zone Submodule

      60
    • 2.7.4 Generating Trip Event Interrupts

      62
  • 2.8 Event-Trigger (ET) Submodule

    63
    • 2.8.1 Operational Overview of the Event-Trigger Submodule

      64
• 3 Applications to Power Topologies

  69
  • 3.1 Overview of Multiple Modules

    70
  • 3.2 Key Configuration Capabilities

    70
  • 3.3 Controlling Multiple Buck Converters With Independent Frequencies

    71
  • 3.4 Controlling Multiple Buck Converters With Same Frequencies

    75
  • 3.5 Controlling Multiple Half H-Bridge (HHB) Converters

    78
  • 3.6 Controlling Dual 3-Phase Inverters for Motors (ACI and PMSM)

    80
  • 3.7 Practical Applications Using Phase Control Between PWM Modules

    84
  • 3.8 Controlling a 3-Phase Interleaved DC/DC Converter

    85
  • 3.9 Controlling Zero Voltage Switched Full Bridge (ZVSFB) Converter

    89
• 4 Registers

  93
  • 4.1 Time-Base Submodule Registers

    94
  • 4.2 Counter-Compare Submodule Registers

    97
  • 4.3 Action-Qualifier Submodule Registers

    99
  • 4.4 Dead-Band Submodule Registers

    103
  • 4.5 PWM-Chopper Submodule Control Register

    105
  • 4.6 Trip-Zone Submodule Control and Status Registers

    106
  • 4.7 Event-Trigger Submodule Registers

    110
  • 4.8 Proper Interrupt Initialization Procedure

    115
• A Revision History

  117