Benutzerhandbuch für Toshiba TMP87CM24AF

Inhaltsverzeichnis

• TMP87CM24A/P24A

  1
• Features

  1
• Pin Assignments (Top View)

  3
• Block Diagram

  4
• Pin Functions

  5
• Operational Description

  6
  • 1. CPU Core Functions

    6
    • 1.1 Memory Address Map

      6
    • 1.2 Program Memory (ROM)

      7
    • 1.3 Program Counter (PC)

      8
    • 1.4 Data Memory (RAM)

      9
    • 1.5 General-purpose Register Banks

      11
    • 1.6 Program Status Word (PSW)

      13
      • 1.6.1 Register Bank Selecter (RBS)

        13
      • 1.6.2 Flags

        13
    • 1.7 Stack and Stack Pointer

      14
      • 1.7.1 Stack

        14
      • 1.7.2 Stack Pointer (SP)

        15
    • 1.8 System Clock Controller

      15
      • 1.8.1 Clock Generator

        16
      • 1.8.2 Timing Generator

        16
      • 1.8.3 Stand-by Controller

        18
      • 1.8.4 Operating Mode Control

        22
    • 1.9 Interrupt Controller

      30
      • 1.9.1 Interrupt Sequence

        34
      • 1.9.2 Software Interrupt (INTSW)

        37
      • 1.9.3 External Interrupts

        37
    • 1.10 Watchdog Timer (WDT)

      47
      • 1.10.1 Watchdog Timer Configuration

        47
      • 1.10.2 Watchdog Timer Control

        47
      • 1.10.3 Watchdog Timer Interrupt (INTWDT)

        49
      • 1.10.4 Watchdog Timer Reset

        50
    • 1.11 Reset Circuit

      50
      • 1.11.1 External Reset Input

        51
      • 1.11.2 Address-Trap-Reset

        51
      • 1.11.3 Watchdog Timer Reset

        51
      • 1.11.4 System-Clock-Reset

        51
  • 2. Peripheral Hardware Functions

    52
    • 2.1 Special Function Registers (SFR) and Data Buffer Registers (DBR)

      52
    • 2.2 I/O Ports

      53
      • 2.2.1 Port P0 (P07 to P00)

        54
      • 2.2.2 Port P1 (P17 to P10)

        55
      • 2.2.3 Port P2 (P22 to P20)

        56
      • 2.2.4 Port P3 (P35 to P30)

        57
      • 2.2.5 Port P4 (P47 to P40)

        58
      • 2.2.6 Port P5 (P57 to P50)

        59
      • 2.2.7 Ports P6 (P67 to P60) Port P7 (P77 to P70) Port P8 (P87 to P80) Port P9 (P93 to P90)

        60
    • 2.3 Time Base Timer (TBT)

      62
    • 2.4 Divider Output (DVO)

      63
    • 2.5 16-Bit Timer/Counter 1 (TC1)

      65
      • 2.5.1 Configuration

        65
      • 2.5.2 Control

        66
      • 2.5.3 Function

        67
    • 2.6 16-Bit Timer/Counter 2 (TC2)

      74
      • 2.6.1 Configuration

        74
      • 2.6.2 Control

        74
      • 2.6.3 Function

        75
    • 2.7 8-Bit Timer/Counter 3 (TC3)

      76
      • 2.7.1 Configuration

        76
      • 2.7.2 Control

        77
      • 2.7.3 Function

        77
    • 2.8 8-Bit Timer/Counter 5 (TC5)

      79
      • 2.8.1 Configuration

        79
      • 2.8.2 Control

        79
      • 2.8.3 Function

        80
    • 2.9 Serial Interface (SIO1, SIO2)

      82
      • 2.9.1 Configuration

        82
      • 2.9.2 Control

        82
      • 2.9.3 Transfer Mode

        86
    • 2.10 LCD Driver

      91
      • 2.10.1 Configuration

        91
      • 2.10.2 Control

        92
      • 2.10.3 LCD Display Operation

        97
      • 2.10.4 Control Method of LCD Driver

        98
    • 2.11 8-Bit AD Converter (ADC)

      106
      • 2.11.1 Configuration

        106
      • 2.11.2 Control

        106
      • 2.11.3 Operation

        107
• Input/Output Circuitry

  110
• Electrical Characteristics

  112