Benutzerhandbuch für Toshiba TOPAS900

Inhaltsverzeichnis

• Definitions and Abbreviations

  5
• Introduction

  6
• 1.1. What is TOPAS900 Flash?

  6
• 1.2. Key Features of TOPAS900 Flash Package

  6
• Let’s start with TOPAS900 Flash

  7
• 2.1. What is in the box?

  7
• 2.2. Unpacking

  7
• 2.3. A Glance at the TOPAS900 Flash Board

  8
• 2.4. Principe of Connection

  9
• Hardware Description

  10
• 3.1. Programming and Debugging Board

  10
• Firmware Processor

  10
• Power Supply

  10
• Status LEDs

  11
• Control Switches (Reset and NMI)

  11
• Serial Communication, Connector and Line Driver

  11
• Connector to Flash Carrier Board

  11
• 3.2. The Flash Carrier Board

  11
• The TMP95FY64F Microcontroller

  12
• 512 kb Flash ROM - Toshiba TC58F400 (90 ns)

  13
• 128 kb RAM - Toshiba TC551001 (70 ns)

  14
• Connector to Programming and Debugging Board

  14
• MCU Terminal Connectors

  14
• Jumpers

  14
• Software Description

  16
• 4.1. IAR Tools

  16
• Embedded Workbench

  16
• C-Spy Debugger/Simulator

  17
• C-Spy ROM-Monitor

  18
• IAR Tools Limitations

  18
• 4.2. Toshiba Tools

  19
• Compiler, Assembler, Linker, Converter

  19
• TMPro Debugger

  22
• TMPro ROM-Monitor

  25
• Toshiba Tool Limitations

  26
• 4.3. ROM-Monitor Memory Usage

  27
• IAR ROM-Monitor

  27
• Toshiba ROM-Monitor

  28
• 4.4. Restrictions of ROM-Monitor Usage

  29
• Functional Description

  30
• 5.1. Operating Modes

  30
• MCU Internal Memory Map

  30
• Internal Mapping in different Modes

  31
• Programming in Single Boot Mode

  31
• Normal Operation Mode

  32
• 5.2. Jumper Description

  34
• The jumpers of the Programming-Debugging Board

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• The jumpers of the Flash Carrier Board

  34
• 5.3. Programming of Flash Memory

  34
• Technical Sheets

  36
• 6.1. Board Schematics

  36
• 6.2. Component Print

  41
• 6.3. PCB Routing

  42
• Application Board

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• Electromagnetic Compatibility

  45
• Figure 1 : The TOPAS900 Flash Board (Top View)

  8
• Figure 2 : Breaking off TOPAS900 Flash Board from Flash Carrier Board

  9
• Figure 3 : Principe of Connection

  9
• Figure 4 : TMP95FY64 Schematic Block Diagram

  13
• Figure 5 : IAR Embedded Workbench Desktop with Project Window

  17
• Figure 6 : C-Spy Desktop with Source Code, Memory and Register Window

  19
• Figure 7 : TMPro Window

  22
• Figure 8 : Memory Usage of IAR ROM-Monitor

  27
• Figure 9 : Memory Usage of Toshiba ROM-Monitor

  28
• Figure 10 : The MCU's Internal Memory Map

  30
• Figure 11 : Internal Mapping in Single Boot and Single Chop Mode

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• Figure 12 : Map for Internal Flash Programming

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• Figure 13 : Memory Map for using external / internal Flash

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• Figure 14 : Flash Programmer Window

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• Figure 15 : Schematic Page 1 of 4

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• Figure 16 : Schematic Page 2 of 4

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• Figure 17 : Schematic Page 3 of 4

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• Figure 18 : Schematic Page 4 of 4

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• Figure 19 : Component Print – Top & Bottom View

  41
• Figure 20 : PCB Routing – Top & Bottom View

  42
• Figure 21 : The Application Board

  43