Panasonic MN101C77C User Manual
VII - 7
Chapter 7 16-bit Timer
Control Registers
Binary counter is a 16-bit up counter. If any data is written to a preset register when the counting is
stopped, the binary counter is cleared to x'0000'.
stopped, the binary counter is cleared to x'0000'.
Figure 7-2-9 Timer 7 Binary Counter Lower 8 bits (TM7BCL : x'03F70', R)
Timer 7 Binary Counter (TM7BC)
Figure 7-2-10 Timer 7 Binary Counter Upper 8 bits (TM7BCH : x'03F71', R)
Figure 7-2-11 Timer 7 Input Capture Register Lower 8 bits (TM7ICL : x'03F76', R)
Timer 7 Input Capture Register (TM7IC)
Figure 7-2-12 Timer 7 Input Capture Register Upper 8 bits (TM7ICH : x'03F77', R)
Input capture register is a register that holds the value loaded from a binary counter by capture trigger.
Capture trigger is generated by an input signal from an external interrupt pin, and when an arbitrary value
is written to an input capture register (Directly writing to the register by program is disable.).
Capture trigger is generated by an input signal from an external interrupt pin, and when an arbitrary value
is written to an input capture register (Directly writing to the register by program is disable.).
7
6
5
4
3
2
1
0
( At reset : X X X X X X X X )
TM7BCL
TM7BCL7 TM7BCL6 TM7BCL5 TM7BCL4 TM7BCL3 TM7BCL2 TM7BCL1 TM7BCL0
7
6
5
4
3
2
1
0
( At reset : X X X X X X X X )
TM7BCH
TM7BCH7 TM7BCH6 TM7BCH5 TM7BCH4 TM7BCH3 TM7BCH2 TM7BCH1 TM7BCH0
7
6
5
4
3
2
1
0
( At reset : X X X X X X X X )
TM7ICL
TM7ICL7 TM7ICL6 TM7ICL5 TM7ICL4
TM7ICL3
TM7ICL2
TM7ICL1 TM7ICL0
7
6
5
4
3
2
1
0
( At reset : X X X X X X X X )
TM7ICH
TM7ICH7 TM7ICH6 TM7ICH5 TM7ICH4 TM7ICH3 TM7ICH2 TM7ICH1 TM7ICH0