Panasonic MN101C77C User Manual

Page of 544
Operation
Chapter 14    Automatic Transfer Controller
XIV - 17
13
Set the source I/O address in lower 8 bits of memory pointer 1 (AT1MAP1L), and set the destination
address in 18-bit memory pointer 0 (AT1MAP0H, M, L). The upper 10 bits of the I/O space address
(x'03F') need not to be set in AT1MAP1H and AT1MAP1M.
In transfer mode 3, the value in memory pointer 0 increments by 1 each time a byte-length data transfer
ends. As a result, the destination address for the next transfer is one address higher than that for the
previous transfer.
Set the data transfer count for ATC1 in the transfer data counter (AT1TRC). The counter can be set to
a maximum of 255 transfers. The counter decrements each time ATC1 is activated. When it reaches
x'00', an interrupt (ATC1IRQ) occurs and the automatic transfer ends.
(1)
(2)
AT1MAP0
AT1MAP0 + 1
AT1MAP0 + 2
AT1MAP0 + 3
AT1MAP1
Memory Pointer 0
00000 - 3FFFF
03F00 - 03FFF
Memory Pointer 1
(Only lower 
8 bits are valid)
14-3-8
Transfer  Mode 3
In transfer mode 3, ATC1 automatically transfers one byte of data from the I/O space (special registers :
x'03F00' - x'03FFF') to any memory space every time an ATC1 activation request occurs.
Figure 14-3-5    Transfer Mode 3