Sony mz-dh10p User Manual

Page of 64
MZ-DH10P
27
27
MZ-DH10P
6-6. SCHEMATIC  DIAGRAM  – MAIN Board (3/9) –
 See page 24 for Waveforms.
 See page 38 for IC Block Diagrams.
L504
10
µ
H
10
µ
H
10
µ
H
L502
C527
L503
10
µ
H
C517
C516
C515
C511
CN501
FB501
C573
FB502
C556
C557
R501
R502
L506
C567
C559
R512
R517
R518
R519
R509
C565
C555
R511
R524
R520
C526
L505
10
µ
H
C564
C560
R514
R515
R516
Q502
Q504
Q503
C558
FB503
C531
C533
C521
C522
C525
C529
C518
C520
C513
C519
C545
C547
C550
C536
C537
C539
C553
C554
R505
C530
C528
C524
C523
R510
R525
C566
C552
C503
R513
L507
C570
C508
TP516
TP509
C538
0.1
0.1
0.1
0.1
0.1
26P
1000p
0
4.7
6.3V
0.1
2.2k
1k
4.7
6.3V
4700p
0
10k
47k
1k
0
0.1
4700p
0
220
470
100p
4.7
10V
0.1
47k
10k
47k
2SA1745-6.7-TL
2SC4627J-C
(TX).SO
2SC4738F-Y/
GR(TPL3)
1000p
0
0.01
0.01
10p
10p
4700p
0.1
4.7
6.3V
0.1
0.01
0.1
0.1
0.047
0.047
0.022
1
1
4.7
6.3V
0.1
10
1
0.1
0.01
0.1
0
0
0.1
0.01
1000p
10k
4.7
6.3V
4700p
B1
B2
B3
F1
K1
K2
L1
L2
R1
PEAK
PLSE_XDC
XLDON
BOTM
OFTRK
MDVCC_CTL
RFI
VIN
ADIP
VC
S_MON
APCREF_DA
SSB_DATA
SSB_CLK
XRST_RF
ABCD
FE
TE
S0
S1
AMICE_VREF
AMICE_FS256
PEAK
PEAK
PLSE_XDC
PLSE_XDC
XLDON
XLDON
BOTM
BOTM
OFTRK
OFTRK
MDVCC_CTL
MDVCC_CTL
RFI
RFI
VIN
VIN
VC
ADIP
ADIP
VC
S_MON
S_MON
APCREF_DA
APCREF_DA
TE
FE
ABCD
XRST_RF
SSB_DATA
SSB_CLK
SSB_DATA
SSB_CLK
XRST_RF
ABCD
TE
FE
TRK-
TRK+
FCS+
FCS-
S0
S1
S0
S1
AMICE_VREF
AMICE_FS256
AMICE_VREF
AMICE_FS256
TRK+
FCS-
FCS+
TRK-
L1
L2
CONT
PLSE_XDC
PVCC
IIN
LDK
MDVCC
GND
F
VREF
VCC
JY
JX
IY
IX
A
B
C
D
RF BUFFER
Q502,503
B+ SWITCH
S1
S0
(3/9)