Intel N450 AU80610004653AA User Manual
Product codes
AU80610004653AA
Thermal Specifications and Design Considerations
68
Datasheet
When Intel Thermal Monitor-2 is enabled and a high temperature situation exists, the
processor will perform an Enhanced Intel
processor will perform an Enhanced Intel
®
SpeedStep Technology transition to the LFM.
When the processor temperature drops below the critical level, the processor will make
an Enhanced Intel
an Enhanced Intel
®
SpeedStep Technology transition to the last requested operating
point.
Intel Thermal Monitor-1 and Intel Thermal Monitor-2 can co-exist within the processor.
If both Intel Thermal Monitor-1 and Intel Thermal Monitor-2 bits are enabled in the
auto-throttle MSR, Intel Thermal Monitor-2 will take precedence over Intel Thermal
Monitor-1.
If both Intel Thermal Monitor-1 and Intel Thermal Monitor-2 bits are enabled in the
auto-throttle MSR, Intel Thermal Monitor-2 will take precedence over Intel Thermal
Monitor-1.
However, if Force Intel Thermal Monitor-1 over Intel Thermal Monitor-2 is enabled in
MSRs via BIOS and Intel Thermal Monitor-2 is not sufficient to cool the processor below
the maximum operating temperature, then Intel Thermal Monitor-1 will also activate to
help cool down the processor. If a processor load based Enhanced Intel
MSRs via BIOS and Intel Thermal Monitor-2 is not sufficient to cool the processor below
the maximum operating temperature, then Intel Thermal Monitor-1 will also activate to
help cool down the processor. If a processor load based Enhanced Intel
®
SpeedStep
Technology transition (through MSR write) is initiated when a Intel Thermal Monitor-2
period is active, there are two possible results:
period is active, there are two possible results:
•
If the processor load based Enhanced Intel
®
SpeedStep technology transition
target frequency is higher than the Intel Thermal Monitor-2 transition based target
frequency, the processor load-based transition will be deferred until the Intel
Thermal Monitor-2 event has been completed.
frequency, the processor load-based transition will be deferred until the Intel
Thermal Monitor-2 event has been completed.
•
If the processor load-based Enhanced Intel
®
SpeedStep technology transition
target frequency is lower than the Intel Thermal Monitor-2 transition based target
frequency, the processor will transition to the processor load-based Enhanced
Intel
frequency, the processor will transition to the processor load-based Enhanced
Intel
®
SpeedStep technology target frequency point.
The TCC may also be activated via on-demand mode. If bit 4 of the ACPI Intel Thermal
Monitor control register is written to a 1, the TCC will be activated immediately
independent of the processor temperature. When using on-demand mode to activate
the TCC, the duty cycle of the clock modulation is programmable via bits 3:1 of the
same ACPI Intel Thermal Monitor control register. In automatic mode, the duty cycle is
fixed at 50% on, 50% off, however in on-demand mode, the duty cycle can be
programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments.
On-demand mode may be used at the same time automatic mode is enabled, however,
if the system tries to enable the TCC via on-demand mode at the same time automatic
mode is enabled and a high temperature condition exists, automatic mode will take
precedence.
Monitor control register is written to a 1, the TCC will be activated immediately
independent of the processor temperature. When using on-demand mode to activate
the TCC, the duty cycle of the clock modulation is programmable via bits 3:1 of the
same ACPI Intel Thermal Monitor control register. In automatic mode, the duty cycle is
fixed at 50% on, 50% off, however in on-demand mode, the duty cycle can be
programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments.
On-demand mode may be used at the same time automatic mode is enabled, however,
if the system tries to enable the TCC via on-demand mode at the same time automatic
mode is enabled and a high temperature condition exists, automatic mode will take
precedence.
An external signal, PROCHOT# (processor hot) is asserted when the processor detects
that its temperature is above the thermal trip point. Bus snooping and interrupt
latching are also active while the TCC is active.
that its temperature is above the thermal trip point. Bus snooping and interrupt
latching are also active while the TCC is active.
Besides the thermal sensor and thermal control circuit, the Intel Thermal Monitor also
includes one ACPI register, one performance counter register, three MSR, and one I/O
pin (PROCHOT#). All are available to monitor and control the state of the Intel Thermal
Monitor feature. The Intel Thermal Monitor can be configured to generate an interrupt
upon the assertion or deassertion of PROCHOT#.
includes one ACPI register, one performance counter register, three MSR, and one I/O
pin (PROCHOT#). All are available to monitor and control the state of the Intel Thermal
Monitor feature. The Intel Thermal Monitor can be configured to generate an interrupt
upon the assertion or deassertion of PROCHOT#.