Sony XCD-V60 User Manual

3-1

XCD-U100/SX90/V60

XCD-U100CR/SX90CR/V60CR

These boards consist of CCD (IC101) and ADC (BI-217:
IC105), BI-218: IC102), and BI-219: IC105) that are used

for VGA color/black & white (BI-217), SXGA color/black
& white (BI-218), and UXGA color/black & white (BI-

219).
CCD is driven using the power, communication

(AD_SCK/SL/SDATA), sync signal (AD_CLK/HD/VD),
and CCD vertical drive pulses sent from the FM-96 board

and using the CCD horizontal drive pulse generated by an
analog-to-digital converter (ADC).  CCD analog data is

input to ADC and output to FPGA on the FM-96 board as
digital data so as to produce an LVDS signal through CDS/

GAIN/CLAMP/AD conversion in ADC

This board consists of an oscillator (X200), FPGA (IC201:

TG/DSP/CPU/SDRAM controller incorporating an
IEEE1394LINK, a, b-compatible layer), SDRAM (IC301)

for image saving, SDRAM (IC502) for CPU execution,
EEPROM (IC402) for camera parameter saving, a V driver

(IC200), flash (IC503) for FPGA data saving, and an
FPGA write connector (CN500).  A power pulse is input

from a DC-DC converter through the flexible wiring board
of connector CN101.

The image data of an LVDS signal is input from CN200 to
FPGA as a flow of image data, passed through DSP and

image SDRAM, and converted into a 1394 packet using a
1394LINK layer.  The converted data is output through

CN801 to the 1394PHY layer on the IF-1068 board.
Two-way communication is done in the block related to a

1394 system.  Image data is not only output, but also the
control data from the host is input.  The control data is

saved in the register of a LINK layer.  Internal CPU
interprets instructions and sets them to the internal module

of FPGA.
CN801 is also used as the interface of the external input/

output signal from CN901 on the CN-3020 board.

This board consist of an oscillator (X800), an
IEEE1394PHY layer (IC803), 1394 connectors (CN803

and CN804), and an external input signal isolation circuit
(consisting of PH800, PH801, and PH802).

A power signal is input from a DC-DC converter through
the flexible wiring board of CN802.  It also plays the part

for transferring the original power to the DC-DC convert-
er.

Image data is input from the LINK layer of the FM-96
board to the PHY layer and output to the connected

connectors (CN803 and CN804) as a differential signal of
800/400 MHz.  The control data from host PC is input

from a 1394 connector as a differential signal, and simulta-
neously, power is also supplied from the 1394 connector.

The external input signal input from the CN-3020 board is
passed through an external input signal isolation circuit

and sent to FPGA on the FM-96 board.
X800 is sent to the PHY and FM-96 board because it is

used as the clock of a 1394 system and used in the CPU/
1394 module inside FPGA.

This board consists of a 12-pin connector (CN901) for an
external input/output signal and external power, and an

external output signal isolation circuit (PH901 and
PH902).

External power is used to compensate for the insufficient
power supply on the host side during multiple daisy-chain

connections.