Sony ICX274AQ User Manual
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ICX274AQ
11
12
13
14
15
16
17
18
19
20
Horizontal register
Note)
V
DD
φ
RG
H
φ
2B
H
φ
1B
GND
φ
SUB
C
SUB
V
L
H
φ
1A
H
φ
2A
10
9
8
7
6
5
4
3
2
1
V
OUT
GND
V
φ
1
V
φ
2C
V
φ
2B
V
φ
2A
V
φ
3C
V
φ
3B
V
φ
3A
V
φ
4
B
G
B
G
B
G
R
G
R
G
B
G
B
G
B
G
R
G
R
G
G
R
G
R
B
G
G
R
B
G
G
R
V
e
rtical register
Note) : Photo sensor
Block Diagram and Pin Configuration
(Top View)
Pin Description
∗
1
DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of
0.1µF.
Pin No.
Symbol
Description
Pin No.
Symbol
Description
1
2
3
4
5
6
7
8
9
10
V
φ
4
V
φ
3A
V
φ
3B
V
φ
3C
V
φ
2A
V
φ
2B
V
φ
2C
V
φ
1
GND
V
OUT
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
Signal output
11
12
13
14
15
16
17
18
19
20
V
DD
φ
RG
H
φ
2B
H
φ
1B
GND
φ
SUB
C
SUB
V
L
H
φ
1A
H
φ
2A
Supply voltage
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
GND
Substrate clock
Substrate bias
∗
1
Protective transistor bias
Horizontal register transfer clock
Horizontal register transfer clock