Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  5   CLOCK  GENERATOR 

R01UH0305EJ0200  Rev.2.00 

 

 

164  

Jul 04, 2013 

 

V

POR

Lower limit of  
the operating  
voltage range

At least 10 

μs

Reset  
processing time

 

Power-on reset signal

RESET pin

CPU clock

High-speed on-chip

oscillator clock (f

IH

)

High-speed

system clock (f

MX

)

(when X1 oscillation 

selected)

Subsystem clock (f

SUB

)

(when XT1 oscillation

 selected)

High-speed

system clock

Subsystem

clock

High-speed on-chip

oscillator clock

X1 clock
oscillation stabilization time

Switched by software

>

5

<

>

5

<

<3>

Note 1

<4>

<4>

<2>

<1>

Starting X1 oscillation

is specified by software.

Starting XT1 oscillation

is specified by software.

 

 

<1>  When the power is turned on, an internal reset signal is generated by the power-on-reset (POR) circuit.  Note that 

the reset state is maintained after a reset by the voltage detection circuit or an external reset until the voltage 

reaches the range of operating voltage described in 29.4  AC Characteristics and 30.4  AC Characteristics 

(the above figure is an example when the external reset is in use). 

<2>  When the reset is released, the high-speed on-chip oscillator automatically starts oscillation. 

<3>  The CPU starts operation on the high-speed on-chip oscillator clock after waiting for the voltage to stabilize and a 

reset processing have been performed after reset release. 

<4>  Set the start of oscillation of the X1 or XT1 clock via software (see 5.6.2  Example of setting X1 oscillation 

clock and 5.6.3  Example of setting XT1 oscillation clock). 

<5>  When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set 

switching via software (see 5.6.2  Example of setting X1 oscillation clock and 5.6.3  Example of setting XT1 

oscillation clock). 

 

Notes 1.  The internal reset processing time includes the oscillation accuracy stabilization time of the high-speed on-

chip oscillator clock. 

 

2.  When releasing a reset, confirm the oscillation stabilization time for the X1 clock using the oscillation 

stabilization time counter status register (OSTC).  

 

3.  For the reset processing time, see CHAPTER 20  POWER-ON-RESET CIRCUIT.