Renesas rl78 User Manual

Page of 1004
 
RL78/G1A 
 
CHAPTER  6   TIMER  ARRAY  UNIT 
R01UH0305EJ0200  Rev.2.00 
 
 
190  
Jul 04, 2013 
Figure 6-1.  Entire Configuration of Timer Array Unit 0 (Example: 64-pin products) 
 
Timer clock select register 0 (TPS0)
Peripheral enable
register 0
(PER0)
(Serial input pin)
Input switch 
control register 
(ISC)
INTTM00
(Timer interrupt)
Timer input select 
register 0 (TIS0)
TO01
TI00
TI01
RxD2
TI03
TI04
f
SUB
f
IL
TI05
TI06
TO00
TO03
TO04
TO05
TO06
INTTM02
INTTM03
INTTM04
INTTM05
INTTM06
INTTM07
TI07
TO07
INTTM01
INTTM03H
INTTM01H
2
2
4
4
f
CLK
f
CLK
/2
0
 to f
CLK
/2
15
TAU0EN
f
CLK
/2
1
, f
CLK
/2
2
,
f
CLK
/2
4
,f
CLK
/2
6
,
f
CLK
/2
8
, f
CLK
/2
10
,
f
CLK
/2
12
,f
CLK
/2
14
,
PRS013
PRS003
PRS012PRS011 PRS010
PRS002 PRS001 PRS000
PRS031 PRS030 PRS021 PRS020
TIS02
TIS00
TIS01
Selector
Selector
Selector
Selector
Prescaler
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 0
Channel 1
Channel 7 (LIN-bus supported)
Selector
Selector
ISC1
 
 
Remark  f
SUB
:  Subsystem clock frequency 
 
f
IL
Low-speed on-chip oscillator clock  frequency 
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