Renesas rl78 User Manual

Page of 1004
 
RL78/G1A 
 
CHAPTER  11   A/D  CONVERTER 
R01UH0305EJ0200  Rev.2.00 
 
 
342  
Jul 04, 2013 
 
Figure 11-1.  
Block Diag
ra
m of A/D Converte
 
INTAD
ADCS
ADMD
FR2
FR1
ADCE
FR0
Sample & hold circuit
T
emper
ature sensor
AV
SS
A/D v
oltage compar
ator
A/D con
v
er
ter mode 
register 0 (ADM0)
Inter
nal b
us
Inter
nal b
us
6
Analog input channel 
specification register (ADS)
Controller
A/D con
v
ersion result 
register (ADCR)
Con
v
ersion result 
compar
ison upper limit 
setting register (ADUL)
Con
v
ersion result 
compar
ison lo
w
er limit 
setting register (ADLL)
A/D con
v
ersion 
result upper 
limit/lo
w
er limit 
compar
ator
Timer tr
igger signal (INTRTC)
Timer tr
igger signal (INTIT)
Compar
ison 
voltage 
gener
ator
LV1
LV0
6
A/D por
t configur
ation 
register (ADPC)
ADPC3
ADPC2
ADPC1
ADPC0
A/D test register 
(ADTES)
ADTES1
ADTES0
4
2
ADS3
ADS4
ADS2
ADS1
ADS0
ADISS
ADREFM
ADREFP0
ADRCK
AWC
ADTYP
ADREFP1
Inter
nal ref
erence v
oltage (1.45 
V)
AV
DD
AV
REFP
/ANI0/P20
AV
REFM
/ANI1/P21
AV
SS
ADCS bit
ADREFP1 and ADREFP0 bits
ADTMD1
ADTMD0
ADTRS1
ADTRS0
A/D con
v
er
ter mode 
register 1 (ADM1)
A/D con
v
er
ter mode 
register 2 (ADM2)
Successiv
appro
ximation register 
(SAR)
Inter
nal ref
erence v
oltage (1.45 
V)
ADREFM bit
Selector
Selector
Selector
Selector
Selector
Timer tr
igger signal (INTTM01)
ADSCM
ANI16/P03/SI10/RxD1/SDA10
ANI17/P02/SO10/TxD1
ANI18/P10/SCK00/SCL00
ANI19/P120
ANI20/P10 to ANI24/P15
ANI25/P51/SO11/INTP2
ANI26/P50/SI11/SDA11/INTP1
ANI27/P30/SCK11/SCL11/INTP3/RTC1HZ
ANI28/P70/SCK21/SCL21/KR0
ANI29/P31/TI03/TO03/INTP4
ANI30/P41/TI07/TO07
ANI0/AV
REFP
/P20
ANI1/AV
REFM
/P21
ANI2/P22 to ANI7/P27
ANI8/P150 to ANI12/P154
Analog/digital 
switcher
 
 
Rema
rk
  Ana
lo
g
 inp
u
t pins in f
igure 
11-1 w
h
e
n
 a 64-p
in pro
d
u
ct is used.