Renesas rl78 User Manual

RL78/G1A

CHAPTER 12 SERIAL ARRAY UNIT

R01UH0305EJ0200 Rev.2.00

410

Jul 04, 2013

12.3.1 Peripheral enable register 0 (PER0)

PER0 is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a hardware macro

that is not used is stopped in order to reduce the power consumption and noise.

When serial array unit 0 is used, be sure to set bit 2 (SAU0EN) of this register to 1.

When serial array unit 1 is used, be sure to set bit 3 (SAU1EN) of this register to 1.

The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.

Reset signal generation clears the PER0 register to 00H.

Figure 12-4. Format of Peripheral Enable Register 0 (PER0)

Address: F00F0H After reset: 00H R/W

Symbol

<7> <6> <5> <4> <3> <2> <1> <0>

PER0 RTCEN 0

ADCEN

IICA0EN

SAU1EN

Note

SAU0EN 0 TAU0EN

SAUmEN

Control of serial array unit m input clock supply

Stops supply of input clock.
• SFR used by serial array unit m cannot be written.
• Serial array unit m is in the reset status.

Enables input clock supply.
• SFR used by serial array unit m can be read/written.

Note 32, 48, and 64-pin products only.

Cautions 1. When setting serial array unit m, be sure to first set the following registers with the SAUmEN

bit set to 1. If SAUmEN = 0, control registers of serial array unit m become default values and

writing to them is ignored (except for the input switch control register (ISC), noise filter enable

register 0 (NFEN0), port input mode registers 0, 1 (PIM0, PIM1), port output mode registers 0, 1,

5, 7 (POM0, POM1, POM5, POM7), Port mode contorol registers 0, 1, 3, 5, 7 (PMC0, PMC1,

PMC3, PMC5, PMC7), port mode registers 0, 1, 3, 5, 7 (PM0, PM1, PM3, PM5, PM7), and port

registers 0, 1, 3, 5, 7 (P0, P1, P3, P5, P7)).

• Serial clock select register m (SPSm)
• Serial mode register mn (SMRmn)
• Serial communication operation setting register mn (SCRmn)
• Serial data register mn (SDRmn)
• Serial flag clear trigger register mn (SIRmn)
• Serial status register mn (SSRmn)
• Serial channel start register m (SSm)
• Serial channel stop register m (STm)
• Serial channel enable status register m (SEm)
• Serial output enable register m (SOEm)
• Serial output level register m (SOLm)
• Serial output register m (SOm)
• Serial standby control register m (SSCm)

2. Be sure to clear the following bits to 0.

25-pin products: bits 1, 3, 6

32, 48, 64-pin products: bits 1, 6

Remark m: Unit number (m = 0, 1)

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