Renesas rl78 User Manual

RL78/G1A

CHAPTER 12 SERIAL ARRAY UNIT

R01UH0305EJ0200 Rev.2.00

456

Jul 04, 2013

Figure 12-39. Flowchart of Master Reception (in Continuous Reception Mode)

Starting CSI communication

Reading receive data from

SIOp (=SDRmn[7:0])

Write 1 to STmn bit

= 1

End of communication

Clear MDmn0 bit to 0

Communication continued?

Yes

Writing dummy data to

SIOp (=SDRmn[7:0])

<2>

<3>

<5>

<6>

<7>

<4>

<8>

Yes

BFFmn = 1?

For the initial setting, see Figure 12-34.

(Select

buffer empty

interrupt)

SAU default setting

Setting receive data

Setting storage area of the receive data, number of communication data

(Storage area, Reception data pointer, Number of communication data and

Communication end flag are optionally set on the internal RAM by the software)

Wait for receive completes

Buffer empty/transfer end interrupt

≥ 2

Number of communication

data?

Writing to SIOp makes SCKp

signals out (communication starts)

When interrupt is generated, it moves to

interrupt processing routine

Subtract -1 from number of

transmit data

<1>

Read receive data, if any, then write them to storage

area, and update receive data pointer (also subtract -1

from number of transmit data)

Writing dummy data to

SIOp (=SDRmn[7:0])

= 0

<2>

RETI

Number of communication

data = 0?

Yes

When number of communication data

becomes 0, receive completes

Enables interrupt

Clear interrupt request flag (XXIF), reset interrupt mask (XXMK) and set

interrupt enable (EI)

Write 1 to MDmn0 bit

Disable interrupt (MASK)

Mai

n r
ou
tine

Mai

n routine

Interr

up
t pro

ing
routi

Remarks 1. <1> to <8> in the figure correspond to <1> to <8> in Figure 12-38 Timing Chart of Master

Reception (in Continuous Reception Mode).

m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3), p: CSI number (p = 00, 01, 10, 11, 20, 21),

mn = 00 to 03, 10, 11

<R>