Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  12   SERIAL  ARRAY  UNIT 

R01UH0305EJ0200  Rev.2.00 

 

 

494  

Jul 04, 2013 

 

Setting 

transmission/reception data

Read receive data to SIOp 

(=SDRmn[7:0]) 

Write 1 to STmn bit 

For the initial setting, see Figure 12-64. 

(Select buffer empty interrupt)

 

SAU default setting 

No

Yes

No

= 1

End of communication

Yes

Yes

No 

Communication 

continued? 

Yes 

Number of communication 

data? 

Disable interrupt (MASK)

BFFmn = 1? 

<3> 

<5>

<6> 

<7> 

<4> 

<8> 

<1> 

Subtract -1 from number of 

transmit data

 

Setting storage area and number of data for transmission/reception data 

(Storage area, Transmission/reception data pointer, Number of communication data 

and Communication end flag are optionally set on the internal RAM by the software) 

Clear MDmn0 bit to 0

Writing transmit data to 

SIOp (=SDRmn[7:0])

 

Other than the first interrupt, read reception data then writes 

to storage area, update receive data pointer

 

 

If transmit data is remained (number of communication data 

≥ 2),   

read it from storage area, write it to SIOp, and then, update   

storage pointer. 

If transmit is completed (number of communication data = 1),   

change to transfer end interrupt. 

RETI 

Number of communication

data = 0? 

Starting setting 

Start communication when master start providing the 

clock

 

When buffer empty/transfer end is generated, it moves 

interrupt processing routine

 

Wait for transmission completes

Buffer empty/transfer end interrupt

≥ 2 

= 0 

Enables interrupt 

Write 1 to MDmn0 bit   

Clear interrupt request flag (XXIF), reset interrupt mask (XXMK) and set 

interrupt enable (EI)

 

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Remarks 1.  <1> to <8> in the figure correspond to <1> to <8> in Figure 12-68  Timing Chart of Slave 

Transmission/Reception (in Continuous Transmission/Reception  Mode). 

m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3), p: CSI number (p = 00, 01, 10, 11, 20, 

21), mn = 00 to 03, 10, 11 

<R>