Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  13   SERIAL  INTERFACE  IICA 

This register sets the input/output of port 6 in 1-bit units. 

When using the P60/SCLA0 pin as clock I/O and the P61/SDAA0 pin as serial data I/O, clear PM60 and PM61, and the 

output latches of P60 and P61 to 0. 

Set the IICE0 bit (bit 7 of IICA control register 00 (IICCTL00)) to 1 before setting the output mode because the 

P60/SCLA0 and P61/SDAA0 pins output a low level (fixed) when the IICE0 bit is 0. 

The PM6 register can be set by a 1-bit or 8-bit memory manipulation instruction. 

Reset signal generation sets this register to FFH. 

 

 

PM60

PM61

PM62

PM63

1

1

1

1

PM6n pin I/O mode selection (n = 0 to 3)

Output mode (output buffer on)

Input mode (output buffer off)

PM6n

0

1

0

1

2

3

4

5

6

7

PM6

Address:  FFF26H     After reset:  FFH     R/W

Symbol

 

 

R01UH0305EJ0200  Rev.2.00 

 

 

586  

Jul 04, 2013