Renesas rl78 User Manual
RL78/G1A
CHAPTER 13 SERIAL INTERFACE IICA
(1) Master operation in single-master system
Figure 13-28. Master Operation in Single-Master System
SPTn = 1
SPTn = 1
WRELn = 1
START
END
ACKEn = 0
WTIMn = 1
WRELn = 1
No
No
Yes
No
No
No
Yes
Yes
Yes
Yes
STCENn = 1?
ACKEn = 1
WTIMn = 0
WTIMn = 0
TRCn = 1?
ACKDn = 1?
ACKDn = 1?
No
Yes
No
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
STTn = 1
IICWLn, IICWHn
← XXH
IICFn
← 0XH
Setting STCENn, IICRSVn = 0
IICCTLn0
← 1XX111XXB
IICEn = 1
IICCTLn0
← 0XX111XXB
ACKEn = WTIMn = SPIEn = 1
Setting port
Initializing I
2
C bus
Note
SVAn
← XXH
Writing IICAn
Writing IICAn
Reading IICAn
INTIICAn
interrupt occurs?
End of transfer?
End of transfer?
Restart?
Setting of the port used alternatively as the pin to be used.
First, set the port to input mode and the output latch to 0 (see 13.3.8 Port mode register 6 (PM6)).
First, set the port to input mode and the output latch to 0 (see 13.3.8 Port mode register 6 (PM6)).
Setting port
Set the port from input mode to output mode and enable the output of the I
2
C bus
(see 13.3.8 Port mode register 6 (PM6)).
Sets a transfer clock.
Sets a local address.
Sets a start condition.
Prepares for starting communication
(generates a start condition).
(generates a start condition).
Starts communication
(specifies an address and transfer
direction).
(specifies an address and transfer
direction).
Waits for detection of acknowledge.
Waits for data transmission.
Starts transmission.
Communication processing
Initial setting
Starts reception.
Waits for data
reception.
reception.
INTIICAn
interrupt occurs?
Waits for detection
of acknowledge.
of acknowledge.
Prepares for starting communication
(generates a stop condition).
(generates a stop condition).
Waits for detection of the stop condition.
INTIICAn
interrupt occurs?
INTIICAn
interrupt occurs?
INTIICAn
interrupt occurs?
Setting
IICCTLn1
<R>
<R>
<R>
Note Release (SCLA0 and SDAA0 pins = high level) the I
2
C bus in conformance with the specifications of the product
that is communicating. If EEPROM is outputting a low level to the SDAA0 pin, for example, set the SCLA0 pin in
the output port mode, and output a clock pulse from the output port until the SDAA0 pin is constantly at high
level.
Remarks 1. Conform to the specifications of the product that is communicating, with respect to the transmission and
reception formats.
2. n = 0
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Jul 04, 2013