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Renesas rl78 User Manual

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RL78/G1A 
 
CHAPTER  13   SERIAL  INTERFACE  IICA 
(ii)   When WTIM0 = 1 
 
 
ST
AD6 to AD0
R/W ACK
D7 to D0
D7 to D0
ACK
ACK
SP
  3
  4
  5
  2
  1
 
 
1: IICS0 = 0110×010B 
2: IICS0 = 0010×110B 
3: IICS0 = 0010×100B 
4: IICS0 = 0010××00B 
5: IICS0 = 00000001B 
 
Remark 
: Always 
generated 
 
:  Generated only when SPIE0 = 1 
 ×: 
 
Don’t 
care 
 
 
(6)   Operation when arbitration loss occurs (no communication after arbitration loss) 
When the device is used as a master in a multi-master system, read the MSTS0 bit each time interrupt request 
signal INTIICA0 has occurred to check the arbitration result. 
 
(a)   When arbitration loss occurs during transmission of slave address data (when WTIM0 = 1) 
 
 
ST
AD6 to AD0
R/W ACK
D7 to D0
D7 to D0
ACK
ACK
SP
  2
  1
 
 
1: IICS0 = 01000110B 
2: IICS0 = 00000001B 
 
Remark 
: Always 
generated 
 
:  Generated only when SPIE0 = 1 
 
 
R01UH0305EJ0200  Rev.2.00 
 
 
630  
Jul 04, 2013