Renesas rl78 User Manual
RL78/G1A
CHAPTER 18 STANDBY FUNCTION
Table 18-3. Operating Statuses in SNOOZE Mode
When Inputting CSIp/UARTq Data Reception Signal or A/D Converter Timer Trigger
Signal While in STOP Mode
STOP Mode Setting
Item
When CPU Is Operating on High-speed on-chip oscillator clock (f
IH
)
System clock
Clock supply to the CPU is stopped
f
IH
Operation
started
f
X
Main system clock
f
EX
Stopped
f
XT
Subsystem clock
f
EXS
Use of the status while in the STOP mode continues
f
IL
Set by bits 0 (WDSTBYON) and 4 (WDTON) of option byte (000C0H), and WUTMMCK0
bit of subsystem clock supply mode control register (OSMC)
• WUTMMCK0 = 1: Oscillates
• WUTMMCK0 = 0 and WDTON = 0: Stops
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 1: Oscillates
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 0: Stops
• WUTMMCK0 = 1: Oscillates
• WUTMMCK0 = 0 and WDTON = 0: Stops
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 1: Oscillates
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 0: Stops
CPU
Code flash memory
Data flash memory
RAM
Operation stopped
Port (latch)
Use of the status while in the STOP mode continues
Timer array unit
Operation disabled
Real-time clock (RTC)
12-bit interval timer
Operable
Watchdog timer
See CHAPTER 10 WATCHDOG TIMER
Clock output/buzzer output
Operates when the subsystem clock is selected as the clock source for counting and the
RTCLPC bit is 0 (operation is disabled when a clock other than the subsystem clock is
selected and the RTCLPC bit is not 0).
A/D converter
Operable
Serial array unit (SAU)
Operable only CSIp and UARTq only. Operation disabled other than CSIp and UARTq.
Serial interface (IICA)
Multiplier and divider/multiply-accumulator
DMA controller
Operation disabled
Power-on-reset function
Voltage detection function
External interrupt
Key interrupt function
Operable
High-speed CRC
CRC
operation
function
General-purpose CRC
RAM parity error detection function
RAM guard function
SFR guard function
Illegal-memory access detection function
Operation disabled
<R>
Remarks 1. Operation stopped: Operation is automatically stopped before switching to the SNOOZE mode.
Operation disabled: Operation is stopped before switching to the SNOOZE mode.
f
IH
: High-speed on-chip oscillator clock
f
IL
:
Low-speed on-chip oscillator clock
f
X
: X1 clock
f
EX
:
External main system clock
f
XT
: XT1 clock
f
EXS
: External subsystem clock
2. p = 00; q = 0
R01UH0305EJ0200 Rev.2.00
738
Jul 04, 2013