Renesas rl78 User Manual

 

RL78/G1A 

CHAPTER  21   VOLTAGE  DETECTOR 

 

 

 

The operation mode and detection voltages (V

LVDH

, V

LVDL

, V

LVD

) for the voltage detector is set by using the option byte 

(000C1H). 

The voltage detector (LVD) has the following functions. 

 
•  The LVD circuit compares the supply voltage (V

DD

) with the detection voltage (V

LVDH

, V

LVDL

, V

LVD

), and generates an 

internal reset or interrupt request signal. 

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•  The detection level for the power supply detection voltage (V

LVDH

, V

LVDL

, V

LVD

) can be selected by using the option 

byte as one of 12 levels (for details, see CHAPTER 24  OPTION BYTE). 

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•  Operable in STOP mode. 
•  After power is supplied, the reset state must be retained until the operating voltage becomes in the range defined in 

29.4 or 30.4  AC Characteristics.  This is done by utilizing the voltage detector or controlling the externally input 

reset signal.  After the power supply is turned off, this LSI should be placed in the STOP mode, or placed in the 

reset state by utilizing the voltage detector or controlling the externally input reset signal before the voltage falls 

below the operating range.  The range of operating voltage varies with the setting of the user option byte (000C2H 

or 010C2H). 

 

The two detection voltages (V

LVDH

, V

LVDL

) are selected by the option byte 000C1H.  The high-voltage detection 

level (V

LVDH

) is used for releasing resets and generating interrupts.  The low-voltage detection level (V

LVDL

) is 

used for generating resets. 

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The detection voltage (V

LVD

) selected by the option byte 000C1H is used for generating/releasing resets. 

 

The detection voltage (V

LVD

) selected by the option byte 000C1H is used for releasing resets/generating interrupts. 

 

The reset and internal interrupt signals are generated in each mode as follows. 

 

Interrupt & Reset Mode 

(LVIMDS1, LVIMDS0 = 1, 0) 

Reset Mode 

(LVIMDS1, LVIMDS0 = 1, 1) 

Interrupt Mode 

(LVIMDS1, LVIMDS0 = 0, 1) 

Generates an interrupt request signal by 

detecting V

DD

 < V

LVDH

 when the operating 

voltage falls, and an internal reset by 

detecting V

DD

 < V

LVDL

. 

Releases an internal reset by detecting 

V

DD

 

≥ V

LVDH

.   

Releases an internal reset by detecting 

V

DD

 

≥ V

LVD

. 

Generates an interrupt request signal by 

detecting V

DD

 < V

LVD

. 

Releases an internal reset by detecting 

V

DD

 

≥ V

LVD

 at power on after the first 

release of the POR. 

Generates an interrupt request signal by 

detecting V

DD

 < V

LVD

 or V

DD

 

≥ V

LVD

 at 

power on after the second release of the 

POR.   

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While the voltage detector is operating, whether the supply voltage is more than or less than the detection level can be 

checked by reading the voltage detection flag (LVIF: bit 0 of the voltage detection register (LVIM)). 

Bit 0 (LVIRF) of the reset control flag register (RESF) is set to 1 if reset occurs.  For details of the RESF register, see 

CHAPTER 19  RESET FUNCTION. 

 

R01UH0305EJ0200  Rev.2.00 

 

 

754  

Jul 04, 2013