Renesas rl78 User Manual
RL78/G1A
CHAPTER 28 INSTRUCTION SET
R01UH0305EJ0200 Rev.2.00
835
Jul 04, 2013
Table 28-5. Operation List (3/17)
Notes 1. Number of CPU clocks (f
CLK
) when the internal RAM area, SFR area, or extended SFR area is accessed, or
when no data is accessed.
2.
Number of CPU clocks (f
CLK
) when the code flash memory is accessed, or when the data flash memory is
accessed by an 8-bit instruction.
3. Except r = A
Remark Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction
from the internal RAM area, the number becomes double number plus 3 clocks at a maximum.
Clocks Flag
Instruction
Group
Mnemonic Operands Bytes
Note 1
Note 2
Clocks
Z AC CY
A, [HL+B]
2
1
4
A
← (HL + B)
[HL+B], A
2
1
−
(HL + B)
← A
A, ES:[HL+B]
3
2
5
A
← ((ES, HL) + B)
ES:[HL+B], A
3
2
−
((ES, HL) + B)
← A
A, [HL+C]
2
1
4
A
← (HL + C)
[HL+C], A
2
1
−
(HL + C)
← A
A, ES:[HL+C]
3
2
5
A
← ((ES, HL) + C)
ES:[HL+C], A
3
2
−
((ES, HL) + C)
← A
X, !addr16
3
1
4
X
← (addr16)
X, ES:!addr16
4
2
5
X
← (ES, addr16)
X, saddr
2
1
−
X
← (saddr)
B, !addr16
3
1
4
B
← (addr16)
B, ES:!addr16
4
2
5
B
← (ES, addr16)
B, saddr
2
1
−
B
← (saddr)
C, !addr16
3
1
4
C
← (addr16)
C, ES:!addr16
4
2
5
C
← (ES, addr16)
C, saddr
2
1
−
C
← (saddr)
MOV
ES, saddr
3
1
−
ES
← (saddr)
A, r
Note 3
1 (r = X)
2 (other
than r = X)
1
−
A
←→ r
A, !addr16
4
2
−
A
←→ (addr16)
A, ES:!addr16
5
3
−
A
←→ (ES, addr16)
A, saddr
3
2
−
A
←→ (saddr)
A, sfr
3
2
−
A
←→ sfr
A, [DE]
2
2
−
A
←→ (DE)
A, ES:[DE]
3
3
−
A
←→ (ES, DE)
A, [HL]
2
2
−
A
←→ (HL)
A, ES:[HL]
3
3
−
A
←→ (ES, HL)
A, [DE+byte]
3
2
−
A
←→ (DE + byte)
A, ES:[DE+byte]
4
3
−
A
←→ ((ES, DE) + byte)
A, [HL+byte]
3
2
−
A
←→ (HL + byte)
8-bit data
transfer
XCH
A, ES:[HL+byte]
4
3
−
A
←→ ((ES, HL) + byte)
<R>