Renesas rl78 User Manual
RL78/G1A
CHAPTER 29 ELECTRICAL SPECIFICATIONS (T
A
=
−40 to +85°C)
R01UH0305EJ0200 Rev.2.00
865
Jul 04, 2013
29.4 AC Characteristics
(T
A
=
−40 to +85°C, AV
DD
≤ V
DD
≤ 3.6 V, 1.6 V ≤ EV
DD0
≤ V
DD
≤ 3.6 V, V
SS
= EV
SS0
= 0 V)
Items Symbol
Conditions MIN.
TYP.
MAX.
Unit
2.7 V
≤ V
DD
≤ 3.6 V 0.03125
1
μs
HS (high-speed
main) mode
main) mode
2.4 V
≤ V
DD
< 2.7 V
0.0625
1
μs
LS (low-speed
main) mode
main) mode
1.8 V
≤ V
DD
≤ 3.6 V
0.125
1
μs
Main system
clock (f
clock (f
MAIN
)
operation
LV (low-voltage
main) mode
main) mode
1.6 V
≤ V
DD
≤ 3.6 V
0.25
1
μs
Subsystem clock (f
SUB
)
operation
1.8 V
≤ V
DD
≤ 3.6 V
28.5
30.5
31.3
μs
2.7 V
≤ V
DD
≤ 3.6 V 0.03125
1
μs
HS (high-speed
main) mode
main) mode
2.4 V
≤ V
DD
< 2.7 V
0.0625
1
μs
LS (low-speed
main) mode
main) mode
1.8 V
≤ V
DD
≤ 3.6 V
0.125
1
μs
Instruction cycle (minimum
instruction execution time)
instruction execution time)
T
CY
In the self
programming
mode
programming
mode
LV (low-voltage
main) mode
main) mode
1.6 V
≤ V
DD
≤ 3.6 V
0.25
1
μs
2.7 V
≤ V
DD
≤ 3.6 V
1.0
20.0
MHz
2.4 V
≤ V
DD
< 2.7 V
1.0
16.0
MHz
1.8 V
≤ V
DD
< 2.4 V
1.0
8.0
MHz
f
EX
1.6 V
≤ V
DD
< 1.8 V
1.0
4.0
MHz
External system clock
frequency
frequency
f
EXS
32 35
kHz
2.7 V
≤ V
DD
≤ 3.6 V
24
ns
2.4 V
≤ V
DD
< 2.7 V
30
ns
1.8 V
≤ V
DD
< 2.4 V
60
ns
t
EXH
, t
EXL
1.6 V
≤ V
DD
< 1.8 V
120
ns
External system clock input
high-level width, low-level
width
high-level width, low-level
width
t
EXHS
, t
EXLS
13.7
μs
TI00, TI01, TI03 to TI07
input high-level width,
low-level width
input high-level width,
low-level width
t
TIH
, t
TIL
1/f
MCK
+10
ns
Note
2.7 V
≤ EV
DD0
≤ 3.6 V
8
MHz
1.8 V
≤ EV
DD0
< 2.7 V
4
MHz
HS (high-speed main)
mode
mode
1.6 V
≤ EV
DD0
< 1.8 V
2
MHz
1.8 V
≤ EV
DD0
≤ 3.6 V
4
MHz
LS (low-speed main)
mode
mode
1.6 V
≤ EV
DD0
< 1.8 V
2
MHz
TO00, TO01, TO03 to TO07
output frequency
output frequency
f
TO
LV (low-voltage main)
mode
mode
1.6 V
≤ EV
DD0
≤ 3.6 V
2
MHz
2.7 V
≤ EV
DD0
≤ 3.6 V
8
MHz
1.8 V
≤ EV
DD0
< 2.7 V
4
MHz
HS (high-speed main)
mode
mode
1.6 V
≤ EV
DD0
< 1.8 V
2
MHz
1.8 V
≤ EV
DD0
≤ 3.6 V
4
MHz
LS (low-speed main)
mode
mode
1.6 V
≤ EV
DD0
< 1.8 V
2
MHz
1.8 V
≤ EV
DD0
≤ 3.6 V
4
MHz
PCLBUZ0, PCLBUZ1
output frequency
output frequency
f
PCL
LV (low-voltage main)
mode
mode
1.6 V
≤ EV
DD0
< 1.8 V
2
MHz
INTP0 1.6
V
≤ V
DD
≤ 3.6 V
1
μs
Interrupt input high-level
width, low-level width
width, low-level width
t
INTH
, t
INTL
INTP1 to INTP11
1.6 V
≤ EV
DD0
≤ 3.6 V
1
μs
1.8 V
≤ EV
DD0
≤ 3.6 V,
1.8 V
≤ AV
DD0
≤ 3.6 V
250 ns
Key interrupt input high-
level width, low-level width
level width, low-level width
t
KR
KR0 to KR9
1.6 V
≤ EV
DD0
< 1.8 V,
1.6 V
≤ AV
DD0
< 1.8 V
1
μs
RESET low-level width
t
RSL
10
μs
(Note and Remark are listed on the next page.)