Avaya 03-300430 User Manual
MAPD-BD (MAPD Interface Circuit Pack TN802)
Issue 1 June 2005
1537
Translation Update Test (#146)
The Translation Update test sends the circuit pack-level information to the MAPD Interface
circuit pack. Translation includes the following data administered for a MAPD Interface circuit
pack (report from display ds1 location):
circuit pack. Translation includes the following data administered for a MAPD Interface circuit
pack (report from display ds1 location):
●
DS1 Link Length between two DS1 endpoints
●
Synchronization Source Control
●
All Zero Suppression
●
Framing Mode
●
Signaling Mode
●
Time Slot Number of the 697-Hz tone
●
Time Slot Number of the 700-Hz tone
Table 563: Test #146 Translation Update Test
Error
Code
Code
Test
Result
Result
Description / Recommendation
ABRT
Internal system error
1. Retry the command at 1-minute intervals up to 5 times.
FAIL
Internal system software error.
1. Verify the MAPD Interface circuit pack translation (display ds1
location).
PASS
Translation data has been downloaded to the MAPD Interface circuit
pack successfully.
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