Avaya 03-300430 User Manual

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Communication Manager Maintenance-Object Repair Procedures
2148 Maintenance Procedures for Avaya Communication Manager 3.0, Media Gateways and Servers
 
DS1 and UDS1 circuit packs can be administered with slip detection enabled using the Slip 
Detection
 field set to y on the add ds1 or change ds1 administration screens (See the 
Administrators Guide for Avaya Communication Manager - 555-233-506). All DS1 and UDS1 
circuit packs administered as slip enabled are counted in the following algorithm:
When over half of the DS1 and UDS1 circuit packs administered as slip enabled are 
experiencing slips, and the primary or secondary synchronization reference is the current 
synchronization reference, synchronization will try the other administered synchronization 
reference.
In situations where one or many circuit packs in the system are experiencing slips, the problem 
could be with the synchronization reference, with individual circuit packs, or with phase 
modulation of the transmitted digital bit streams due to environmental variations of the 
transmission facilities (such as temperature variations that affect the electrical length of a 
transmission line). The circuit packs that can experience slips and the associated error log entry 
for slips are as follows in 
:
When slips occur on any of these circuit packs, first consult the individual circuit pack’s section 
in this manual. If slips occur in small amounts, they may be due to environmental conditions as 
previously described. If no service degradation is occurring, no action is necessary. When the 
system switches synchronization sources, slips can be expected from DS1-BD, UDS1-BD, and 
EXP-INTF circuit packs. If service degradation occurs, after following the repair steps in the 
individual section, use the following trouble shooting techniques.
Table 768: Error Log Entries for Slip Errors
Circuit Pack
Error Log
Name
Error Log Entry for Slips
DS1 Interface
DS1-BD
3073 – 3160
Expansion Interface
EXP-INTF
2305
Switch Node Interface
SNI-BD
1537
IPSI’s Tone-Clock circuit or Tone-Clock circuit pack TDM-CLK
1025
UDS1 Interface
UDS1-BD
3073 – 3160