Avaya 03-300430 User Manual

This test is destructive.
The Inject Single Bit Error test causes a single bit error to be sent within an active framed 
3-in-24 test pattern.
The test is highly destructive and can only be initiated by a test ds1-loop location 
inject-single-bit-error command. An attempt to use this command is rejected if none 

of the three long-duration DS1 loopback/span tests (CPE Loop-Back Jack test, Far CSU 
Loopback test, One-Way Span test) are active on a UDS1-BD circuit pack.
Each trunk or port on the UDS1 Interface circuit pack must be busied out using busyout 
board location before running the Inject Single Bit Error test.

0

NO

BOARD

The test could not relate the internal ID to the port (no board). This could 
be due to incorrect translations, no board is inserted, an incorrect board is 
inserted, or an insane board is inserted.

1. Verify that the board’s translations are correct. Execute add ds1 

location to administer the UDS1 interface if it is not already 

administered.

2. If the board was already administered correctly, check the error log to 

determine whether the board is hyperactive. If so, the board was shut 
down. Reseating the board will re-initialize it.

3. If the board was found to be correctly inserted in step 1, enter 

busyout board location.

4. Enter reset board location.
5. Enter release board location.
6. Enter test board location long.

This should re-establish the linkage between the internal ID and the port.

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