Intel E7220 LF80564QH0778M Data Sheet
Product codes
LF80564QH0778M
Document Number: 318080-002
107
Thermal Specifications
6.3
Platform Environment Control Interface (PECI)
6.3.1
Introduction
PECI offers an interface for thermal monitoring of Intel processor and chipset
components. It uses a single wire, thus alleviating routing congestion issues.
components. It uses a single wire, thus alleviating routing congestion issues.
shows an example of the PECI topology in a system with Intel
®
Xeon
®
Processor 7200 Series and 7300 Series. PECI uses CRC checking on the host side to
ensure reliable transfers between the host and client devices. Also, data transfer
speeds across the PECI interface are negotiable within a wide range (2 Kbps to 2
Mbps). The PECI interface on Intel
ensure reliable transfers between the host and client devices. Also, data transfer
speeds across the PECI interface are negotiable within a wide range (2 Kbps to 2
Mbps). The PECI interface on Intel
®
Xeon
®
Processor 7200 Series and 7300 Series is
disabled by default and must be enabled through BIOS.
Note:
The power-on configuration (POC) settings of third party chipsets may produce different PECI addresses
. Thermal designers should consult their third party chipset designers for
the correct PECI addresses.
6.3.1.1
T
CONTROL
and Tcc Activation on PECI-Based Systems
Fan speed control solutions based on PECI utilize a T
CONTROL
value stored in the
processor IA32_TEMPERATURE_TARGET MSR. This MSR uses the same offset
temperature format as PECI, though it contains no sign bit. Thermal management
devices should infer the T
temperature format as PECI, though it contains no sign bit. Thermal management
devices should infer the T
CONTROL
value as negative. Thermal management algorithms
should utilize the relative temperature value delivered over PECI in conjunction with
the MSR value to control or optimize fan speeds.
the MSR value to control or optimize fan speeds.
shows a conceptual fan
control diagram using PECI temperatures.
Figure 6-7. PECI Topology
P E C I H ost
C on troller
D om ain0
0
x
3
0
x
3
0
D om ain1
0
x
3
0
x
3
0
D om ain0
0
x
3
2
x
3
2
D om ain1
0
x
3
2
x
3
2
S ocket 0
C luster ID [1:0] = 0
S ocket 1
C luster ID [1:0] = 1
C 28
C 28
D om ain0
0
x
3
1
x
3
1
D om ain1
0
x
3
1
x
3
1
S ocket 2
C luster ID [1:0] = 2
D om ain0
0
x
3
3
x
3
3
D om ain1
0
x
3
3
x
3
3
S ocket 3
C luster ID [1:0] = 3
C 28
C 28