Intel L3426 BV80605004737AA Data Sheet

Product codes
BV80605004737AA
Page of 102
Electrical Specifications
30
Dual-Core Intel® Xeon® Processor 3000 Series Datasheet
2.7.6
FSB Frequency Select Signals (BSEL[2:0]) 
The BSEL[2:0] signals are used to select the frequency of the processor input clock 
(BCLK[1:0]). 
 defines the possible combinations of the signals and the 
frequency associated with each combination. The required frequency is determined by 
the processor, chipset, and clock synthesizer. All agents must operate at the same 
frequency. 
The Dual-Core Intel
®
 Xeon
®
 processor 3000 series operates at a 1066 MHz FSB 
frequency (selected by a 266 MHz BCLK[1:0] frequency). 
2.7.7
Phase Lock Loop (PLL) and Filter
An on-die PLL filter solution will be implemented on the processor. The VCCPLL input is 
used for the PLL. Refer to 
 for DC specifications. 
Table 2-16. Core Frequency to FSB Multiplier Configuration
Multiplication of 
System Core 
Frequency to FSB 
Frequency
Core Frequency 
(266 MHz 
BCLK/1066 MHz FSB)
Core Frequency 
(333 MHz 
BCLK/1333 MHz 
FSB)
Notes
1, 2
Notes:
1. Individual processors operate only at or below the rated frequency.
2. Listed frequencies are not necessarily committed production frequencies.
1/6
1.60 GHz
2.00 GHz
-
1/7
1.87 GHz
2.33 GHz
-
1/8
2.13 GHz
2.66 GHz
-
1/9
2.40 GHz
3.00 GHz
-
1/10
2.66 GHz
na
-
1/11
2.93 GHz
na
-
Table 2-17. BSEL[2:0] Frequency Table for BCLK[1:0]
BSEL2
BSEL1
BSEL0
FSB Frequency
L
L
L
266 MHz
L
L
H
RESERVED
L
H
H
RESERVED
L
H
L
RESERVED
H
H
L
RESERVED
H
H
H
RESERVED
H
L
H
RESERVED
H
L
L
333 MHz