Intel Xeon 3040 HH80557KH0362M Data Sheet
Product codes
HH80557KH0362M
Thermal Specifications and Design Considerations
86
Dual-Core Intel® Xeon® Processor 3000 Series Datasheet
Figure 5-6. Processor PECI Topology
5.4.1.1
Key Difference with Legacy Diode-Based Thermal Management
Fan speed control solutions based on PECI uses a T
CONTROL
value stored in the
processor IA32_TEMPERATURE_TARGET MSR. The T
CONTROL
MSR uses the same offset
temperature format as PECI though it contains no sign bit. Thermal management
devices should infer the T
CONTROL
value as negative. Thermal management algorithms
should use the relative temperature value delivered over PECI in conjunction with the
T
CONTROL
MSR value to control or optimize fan speeds.
shows a conceptual fan
control diagram using PECI temperatures.
The relative temperature value reported over PECI represents the delta below the onset
of thermal control circuit (TCC) activation as indicated by PROCHOT# assertions. As the
temperature approaches TCC activation, the PECI value approaches zero. TCC activates
at a PECI count of zero.
.
.
PECI Host
Controller
Land G5
30
h
Domain 0
Figure 7.
Conceptual Fan Control on PECI-Based Platforms
Min
Max
Fan Speed
(RPM)
T
CONTROL
Setting
TCC Activation
Temperature
PECI = 0
PECI = -10
PECI = -20
Temperature
Note: Not intended to depict actual implementation