Omega Vehicle Security 1400 User Manual

Registers, Data Formats, & Queries

ChartScan User’s Manual

C-17

 The ESB in the Serial Poll Status Register is also cleared by these operations.  The Command Error, Execution
Error and Device Dependent Error are also cleared with an Error Query (E?) command.

 

 

 

 

 

Alarm

 

Set when the acquisition system has sensed a valid alarm condition.  The alarm is cleared when
the alarm condition no longer exists.

 

 

Trigger

 

Detected

 

Set when the acquisition system has detected the trigger condition and will be cleared when the
acquisition is complete or the trigger has been reconfigured.

 

 

Ready

 

Set when the acquisition system is ready to process another command.  It is cleared when the
system is processing a command line.  This bit should be examined with a serial poll prior to
issuing a new command line.  This allows any detected errors to be traced to the specific
command line containing the error.  If all the setup information for the operation of a specific
acquisition system is included in one line, this bit also indicates when all processing is done and
the X command is completed.  This ensures that the acquisition system is done processing all
state changes before initiating any further activity.

 

 

Scan

 

Available

 

Set when at least 1 acquisition scan is available in the acquisition buffer to be read.  Cleared
when there are no scans available in the buffer to be read.

 

 

Message

 

Available
(MAV)

 

Set when the output queue is not empty.  It is cleared when the output queue is empty.  This bit
reflects whether any command responses are still in the output queue.

 

 

Event Status

 

Register Bit
(ESB)

 

Reflects the logical OR of all the bits in the Event Status Register (ESR) ANDed with their
equivalent enable bits in the Event Status Enable (ESE) register.  If this bit is set, at least one bit
in the ESR is set and has its corresponding enable bit in the ESE set.  The status command U0
can be issued to read the ESR.  See the following for more information on ESR and ESE.

 

 

Service

 

Request Bit
(SRQ)

 

Set when the acquisition system is requesting service.  It is cleared when an SPOLL is performed.

 

 

Buffer

 

Overrun

 

Set if a buffer overrun occurs.  It is cleared when the buffer becomes empty by either reading out
the contents of the buffer or performing a Reset (*B) of the buffer.

 

 As mentioned earlier the status reporting registers are organized in a hierarchical structure with the lower level
registers containing more general information and the higher level registers containing more detailed
information about particular events.  In general, the lowest level register, the Status Byte Register (STB)
contains information that may require more immediate action from the controller in that events contained in this
register tend to be more time critical.
 
 However, as mentioned earlier, other registers may access the STB via the ESB bit.  This allows any condition
within the status reporting register hierarchy to have access to the STB and therefore Serial Poll and Service
Request functionality.  The following is an example to show, in brief, how the status reporting register hierarchy
works.  Notice that the clearing of the higher level registers cleared the bits in the lower level registers that were
associated with the root cause of the condition.
 

 

 

 
 A Device Dependent Error will now cause ChartScan to issue a Service Request (SRQ) to the controller.  When
the SRQ occurs, the controller may perform the following sequence to determine the exact cause of the Service
Request.