Intel 2 Duo T6500 AW80577GG0452ML User Manual

Datasheet

49

NOTES:
1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

The V

CCP

 referred to in these specifications refers to instantaneous V

CCP

.

3.

Measured at 0.1 *V

CCP

. 

4.

Measured at 0.9 *V

CCP

. 

5.

For Vin between 0 V and V

CCP

. Measured when the driver is tristated.

6.

Cpad1 includes die capacitance only for DPRSTP#, DPSLP#, PWRGOOD. No package parasitics are 
included.

7.

Cpad2 includes die capacitance for all other CMOS input signals. No package parasitics are included.

NOTES:
1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

Measured at 0.2 V.

3.

V

OH

 is determined by value of the external pull-up resistor to V

CCP

. 

4.

For Vin between 0 V and V

OH

.

5.

Cpad includes die capacitance only. No package parasitics are included.

§ 

V

CCP

I/O Voltage

1.00

1.05

1.10

V

V

IL

Input Low Voltage CMOS

-0.10

0.00

0.3*V

CCP

V

2

V

IH

Input High Voltage

0.7*V

CCP

V

CCP

V

CCP

+0.1

V

2

V

OL

Output Low Voltage

-0.10

0

0.1*V

CCP

V

2

V

OH

Output High Voltage

0.9*V

CCP

V

CCP

V

CCP

+0.1

V

2

I

OL

Output Low Current

1.5

—

4.1

mA

3

I

OH

Output High Current

1.5

—

4.1

mA

4

I

LI

Input Leakage Current

—

—

±100

µA

5

Cpad1

Pad Capacitance

1.80

2.30

2.75

pF

6

Cpad2

Pad Capacitance for CMOS Input

0.95

1.2

1.45

pF

7

V

OH

Output High Voltage

V

CCP

–5%

V

CCP

V

CCP

+5%

V

3

V

OL

Output Low Voltage

0

—

0.20

V

I

OL

Output Low Current

16

—

50

mA

2

I

LO

Output Leakage Current

—

—

±200

µA

4

Cpad

Pad Capacitance

1.80

2.30

2.75

pF

5